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jkrauss
2026-03-09 14:49:03 +00:00
committed by github-actions[bot]
parent 4318d94060
commit 143795c47b
56 changed files with 9013 additions and 9004 deletions
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2
mfg/assembly/Test_5-bom.html
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@@ -85,7 +85,7 @@
<b>Schematic</b>: Test_5<br>
<b>Variant</b>: default<br>
<b>Revision</b>: NO_TAG+ (Unreleased)<br>
<b>Date</b>: 2026-03-08<br>
<b>Date</b>: 2026-03-09<br>
<b>KiCad Version</b>: 9.0.7+1<br>
</td>
<td class="cell-stats">

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mfg/assembly/Test_5-ibom.html
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mfg/fab/Test_5-GERBERS.zip
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mfg/fab/Test_5-fabrication.pdf
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mfg/fab/Test_5-fabrication_notes.txt
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@@ -48,5 +48,9 @@ FABRICATION NOTES (UNLESS OTHERWISE SPECIFIED)
12) FOR REFERENCE ONLY THE STACKUP CORRESPONDS TO JLCPCB
STACKUP JLC04161H-7628.
FOR REFERENCE ONLY. IMPEDANCE IS THE CONTROLLING PARAMETER
OVER LAYER STACKUP. GERBER DATA MAY NOT BE ALTERED EXCEPT
FOR STANDARD FABRICATION ALLOWANCES.
THE SUPPLIED ARTWORK MAY OR MAY NOT CONTAIN THE SPECIFIED
TRACE GEOMETRIES ON EVERY LAYERS SPECIFIED.

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mfg/fab/Test_5-impedance_table.csv
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@@ -1,3 +1,4 @@
Transmission Line,Impedance [ohms],Tolerance [ohms],Layer,Trace Width [mil],Gap [mil],Ref. Layers
Single-Ended Microstrip,50,±10 %,L1,13.75,N/A,L2
Coplanar Differential Pair,100,±10 %,L1,8.68,8.00,L2
Layer,Ref1,Ref2,Type,Impedance [ohms],Width [mil],Space [mil],Tolerance
L1,AIR,L2,SE,50,13.75,-----,10%
L1,AIR,L2,DIFF,90,11.26,8.00,10%
L1,AIR,L2,DIFF,100,8.68,8.00,10%
1 Transmission Line Layer Ref1 Tolerance [ohms] Ref2 Type Trace Width [mil] Impedance [ohms] Gap [mil] Width [mil] Ref. Layers Space [mil] Tolerance
2 Single-Ended Microstrip L1 AIR ±10 % L2 SE 13.75 50 N/A 13.75 L2 ----- 10%
3 Coplanar Differential Pair L1 AIR ±10 % L2 DIFF 8.68 100 90 8.00 11.26 L2 8.00 10%
4 L1 AIR L2 DIFF 100 8.68 8.00 10%

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mfg/fab/gerbers/Test_5--npth.drl
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M48
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FMAT,2

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mfg/fab/gerbers/Test_5--npth_map.pdf
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mfg/fab/gerbers/Test_5--pth.drl
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M48
; DRILL file {KiCad 9.0.7+1} date 2026-03-08T20:55:11+0000
; DRILL file {KiCad 9.0.7+1} date 2026-03-09T14:48:38+0000
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; #@! TF.GenerationSoftware,Kicad,Pcbnew,9.0.7+1
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FMAT,2

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mfg/fab/gerbers/Test_5--pth_map.pdf
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mfg/jlcpcb/Test_5-Fabpack.zip
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mfg/jlcpcb/gerbers/Test_5-B_Cu.gbl
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mfg/jlcpcb/gerbers/Test_5-B_Mask.gbs
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@@ -1,12 +1,12 @@
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mfg/jlcpcb/gerbers/Test_5-B_Paste.gbp
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@@ -1,12 +1,12 @@
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mfg/jlcpcb/gerbers/Test_5-B_Silkscreen.gbo
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@@ -1,12 +1,12 @@
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mfg/jlcpcb/gerbers/Test_5-Edge_Cuts.gm1
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@@ -1,11 +1,11 @@
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.7+1*%
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mfg/jlcpcb/gerbers/Test_5-F_Cu.gtl
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@@ -1,12 +1,12 @@
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mfg/jlcpcb/gerbers/Test_5-F_Mask.gts
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@@ -1,12 +1,12 @@
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.7+1*%
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mfg/jlcpcb/gerbers/Test_5-F_Paste.gtp
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@@ -1,12 +1,12 @@
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.7+1*%
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G01*

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mfg/jlcpcb/gerbers/Test_5-F_Silkscreen.gto
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@@ -1,12 +1,12 @@
%TF.GenerationSoftware,KiCad,Pcbnew,9.0.7+1*%
%TF.CreationDate,2026-03-08T20:55:26+00:00*%
%TF.CreationDate,2026-03-09T14:48:53+00:00*%
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mfg/jlcpcb/gerbers/Test_5-In1_Cu.g1
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@@ -1,12 +1,12 @@
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mfg/jlcpcb/gerbers/Test_5-In2_Cu.g2
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