[bot]: Update Outputs

Test_5-netlist.net

@@ -15,8 +15,8 @@
     (textvar (name "DWG_TITLE_PCB") "PCB, Assembly Name")
     (textvar (name "DWG_TITLE_SCH") "Schematic, Assembly Name")
     (textvar (name "FABRICATION_NOTES") "FABRICATION NOTES (UNLESS OTHERWISE SPECIFIED)\n\n1)	FABRICATE PER IPC-6012A CLASS 2.\n\n2)	OUTLINE DEFINED IN SEPARATE GERBER FILE WITH\n	\"Edge_Cuts.GBR\" SUFFIX.\n\n3)	SEE SEPARATE DRILL FILES WITH \".DRL\" SUFFIX \n	FOR HOLE LOCATIONS.\n\n	SELECTED HOLE LOCATIONS SHOWN ON THIS DRAWING \n	FOR REFERENCE ONLY.\n\n4)	SURFACE FINISH: HAL SNPB\n\n5)	SOLDERMASK ON BOTH SIDES OF THE BOARD SHALL \n	BE LPI, COLOR GREEN.\n\n6)	SILK SCREEN LEGEND TO BE APPLIED PER LAYER \n	STACKUP USING WHITE NON-CONDUCTIVE EPOXY INK.\n\n7)	ALL VIAS ARE TENTED ON BOTH SIDES UNLESS \n	SOLDERMASK OPENED IN GERBER.\n\n8)	RESERVED\n\n9)	PCB MATERIAL REQUIREMENTS:\n\n	A.	FLAMMABILITY RATING MUST MEET OR EXCEED \n		UL94V-0 REQUIREMENTS.\n	B.	Tg 135 C OR EQUIVALENT.\n\n10)	DESIGN GEOMETRY MINIMUM FEATURE SIZES:\n\n	BOARD SIZE				46.000 × 27.500 mm\n	BOARD THICKNESS		1.647 mm\n	TRACE WIDTH			0.100 mm\n	TRACE TO TRACE		0.200 mm\n	MIN. HOLE (PTH)			0.300 mm\n	MIN. HOLE (NPTH)		2.200 mm\n	ANNULAR RING			0.150 mm\n	COPPER TO HOLE		0.250 mm\n	COPPER TO EDGE		0.500 mm\n	HOLE TO HOLE			0.250 mm\n\n11)	ALL DIMENSIONS ARE IN MILLIMETERS UNLESS OTHERWISE\n	SPECIFIED.\n\n12)	FOR REFERENCE ONLY THE STACKUP CORRESPONDS TO JLCPCB\n	STACKUP JLC04161H-7628.\n	FOR REFERENCE ONLY. IMPEDANCE IS THE CONTROLLING PARAMETER\n	OVER LAYER STACKUP. GERBER DATA MAY NOT BE ALTERED EXCEPT\n	FOR STANDARD FABRICATION ALLOWANCES.\n\n	THE SUPPLIED ARTWORK MAY OR MAY NOT CONTAIN THE SPECIFIED\n	TRACE GEOMETRIES ON EVERY LAYERS SPECIFIED.")
-    (textvar (name "GIT_HASH") "98997e6")
+    (textvar (name "GIT_HASH") "fdc2aae")
-    (textvar (name "GIT_HASH_PCB") "98997e6")
+    (textvar (name "GIT_HASH_PCB") "fdc2aae")
     (textvar (name "GIT_HASH_SCH") "5caa450")
     (textvar (name "GIT_URL") "/jkrauss/Test_4")
     (textvar (name "PROJECT_CODE") "P99")

Test_5.kicad_pro

@@ -835,7 +835,7 @@
   ],
   "text_variables": {
     "ASSEMBLY_NAME": "Assembly Name",
-    "ASSEMBLY_NOTES": "",
+    "ASSEMBLY_NOTES": "ASSEMBLY NOTES (UNLESS OTHERWISE SPECIFIED)\n\n1)\tDO NOT POPULATE COMPONENTS ARE MARKED WITH A RED CROSS\n\n2)\tDO NOT POPULATE COMPONENTS ARE NOT PRESENT IN THE BOM\n\n3)\tIF CONFLICTING INFORMATION IS FOUND BETWEEN THE ASSEMBLY\n\tFILE AND BOM, BOM SHOULD BE USED AS THE MAIN SOURCE.\n\n4)\tDOT IDENTIFIES PIN #1 LOCATION AND DEVICE ORIENTATION\n\tWHEN VIEWED FROM THE TOP.",
     "ASSEMBLY_NUMBER": "A99-9000",
     "ASSEMBLY_SCALE": "1",
     "COMPANY": "Asymworks, LLC",
@@ -846,8 +846,8 @@
     "DWG_TITLE_PCB": "PCB, Assembly Name",
     "DWG_TITLE_SCH": "Schematic, Assembly Name",
     "FABRICATION_NOTES": "FABRICATION NOTES (UNLESS OTHERWISE SPECIFIED)\n\n1)\tFABRICATE PER IPC-6012A CLASS 2.\n\n2)\tOUTLINE DEFINED IN SEPARATE GERBER FILE WITH\n\t\"Edge_Cuts.GBR\" SUFFIX.\n\n3)\tSEE SEPARATE DRILL FILES WITH \".DRL\" SUFFIX \n\tFOR HOLE LOCATIONS.\n\n\tSELECTED HOLE LOCATIONS SHOWN ON THIS DRAWING \n\tFOR REFERENCE ONLY.\n\n4)\tSURFACE FINISH: HAL SNPB\n\n5)\tSOLDERMASK ON BOTH SIDES OF THE BOARD SHALL \n\tBE LPI, COLOR GREEN.\n\n6)\tSILK SCREEN LEGEND TO BE APPLIED PER LAYER \n\tSTACKUP USING WHITE NON-CONDUCTIVE EPOXY INK.\n\n7)\tALL VIAS ARE TENTED ON BOTH SIDES UNLESS \n\tSOLDERMASK OPENED IN GERBER.\n\n8)\tRESERVED\n\n9)\tPCB MATERIAL REQUIREMENTS:\n\n\tA.\tFLAMMABILITY RATING MUST MEET OR EXCEED \n\t\tUL94V-0 REQUIREMENTS.\n\tB.\tTg 135 C OR EQUIVALENT.\n\n10)\tDESIGN GEOMETRY MINIMUM FEATURE SIZES:\n\n\tBOARD SIZE\t\t\t\t46.000 \u00d7 27.500 mm\n\tBOARD THICKNESS\t\t1.647 mm\n\tTRACE WIDTH\t\t\t0.100 mm\n\tTRACE TO TRACE\t\t0.200 mm\n\tMIN. HOLE (PTH)\t\t\t0.300 mm\n\tMIN. HOLE (NPTH)\t\t2.200 mm\n\tANNULAR RING\t\t\t0.150 mm\n\tCOPPER TO HOLE\t\t0.250 mm\n\tCOPPER TO EDGE\t\t0.500 mm\n\tHOLE TO HOLE\t\t\t0.250 mm\n\n11)\tALL DIMENSIONS ARE IN MILLIMETERS UNLESS OTHERWISE\n\tSPECIFIED.\n\n12)\tFOR REFERENCE ONLY THE STACKUP CORRESPONDS TO JLCPCB\n\tSTACKUP JLC04161H-7628.\n\tFOR REFERENCE ONLY. IMPEDANCE IS THE CONTROLLING PARAMETER\n\tOVER LAYER STACKUP. GERBER DATA MAY NOT BE ALTERED EXCEPT\n\tFOR STANDARD FABRICATION ALLOWANCES.\n\n\tTHE SUPPLIED ARTWORK MAY OR MAY NOT CONTAIN THE SPECIFIED\n\tTRACE GEOMETRIES ON EVERY LAYERS SPECIFIED.",
-    "GIT_HASH": "fdc2aae",
+    "GIT_HASH": "b8fef39",
-    "GIT_HASH_PCB": "fdc2aae",
+    "GIT_HASH_PCB": "b8fef39",
     "GIT_HASH_SCH": "5caa450",
     "GIT_URL": "/jkrauss/Test_4",
     "PROJECT_CODE": "P99",

Test_5.xml

@@ -5,7 +5,17 @@
     <date>Date1</date>
     <tool>Eeschema 9.0.7+1</tool>
     <textvar name="ASSEMBLY_NAME">Assembly Name</textvar>
-    <textvar name="ASSEMBLY_NOTES"/>
+    <textvar name="ASSEMBLY_NOTES">ASSEMBLY NOTES (UNLESS OTHERWISE SPECIFIED)
+
+1)	DO NOT POPULATE COMPONENTS ARE MARKED WITH A RED CROSS
+
+2)	DO NOT POPULATE COMPONENTS ARE NOT PRESENT IN THE BOM
+
+3)	IF CONFLICTING INFORMATION IS FOUND BETWEEN THE ASSEMBLY
+	FILE AND BOM, BOM SHOULD BE USED AS THE MAIN SOURCE.
+
+4)	DOT IDENTIFIES PIN #1 LOCATION AND DEVICE ORIENTATION
+	WHEN VIEWED FROM THE TOP.</textvar>
     <textvar name="ASSEMBLY_NUMBER">A99-9000</textvar>
     <textvar name="ASSEMBLY_SCALE">1</textvar>
     <textvar name="COMPANY">Asymworks, LLC</textvar>
@@ -71,8 +81,8 @@
 
 	THE SUPPLIED ARTWORK MAY OR MAY NOT CONTAIN THE SPECIFIED
 	TRACE GEOMETRIES ON EVERY LAYERS SPECIFIED.</textvar>
-    <textvar name="GIT_HASH">fdc2aae</textvar>
+    <textvar name="GIT_HASH">b8fef39</textvar>
-    <textvar name="GIT_HASH_PCB">fdc2aae</textvar>
+    <textvar name="GIT_HASH_PCB">b8fef39</textvar>
     <textvar name="GIT_HASH_SCH">5caa450</textvar>
     <textvar name="GIT_URL">/jkrauss/Test_4</textvar>
     <textvar name="PROJECT_CODE">P99</textvar>

html/Test_5-navigate_mfg_assembly.html

@@ -281,9 +281,9 @@
 <div class="output-comment">Assembly notes in TXT format</div>
 <div class="items-container">
 
-        <div class="output-box " onclick="location.href='../mfg/assembly/Test_5-fabrication_notes.txt'">
+        <div class="output-box " onclick="location.href='../mfg/assembly/Test_5-assembly_notes.txt'">
-            <img src="images/file_txt_64.png" alt="Test_5-fabrication_notes.txt" width="64" height="64">
+            <img src="images/file_txt_64.png" alt="Test_5-assembly_notes.txt" width="64" height="64">
-            <p class="filename">Test_5-fabrication_notes.txt</p>
+            <p class="filename">Test_5-assembly_notes.txt</p>
             <p class="output-name">txt_assembly_notes</p>
         </div>
 </div>

mfg/assembly/Test_5-assembly_notes.txt

@@ -0,0 +1,11 @@
+ASSEMBLY NOTES (UNLESS OTHERWISE SPECIFIED)
+
+1)	DO NOT POPULATE COMPONENTS ARE MARKED WITH A RED CROSS
+
+2)	DO NOT POPULATE COMPONENTS ARE NOT PRESENT IN THE BOM
+
+3)	IF CONFLICTING INFORMATION IS FOUND BETWEEN THE ASSEMBLY
+	FILE AND BOM, BOM SHOULD BE USED AS THE MAIN SOURCE.
+
+4)	DOT IDENTIFIES PIN #1 LOCATION AND DEVICE ORIENTATION
+	WHEN VIEWED FROM THE TOP.

mfg/fab/gerbers/Test_5--npth.drl

@@ -1,7 +1,7 @@
 M48
-; DRILL file {KiCad 9.0.7+1} date 2026-03-09T21:39:22+0000
+; DRILL file {KiCad 9.0.7+1} date 2026-03-09T21:53:45+0000
 ; FORMAT={-:-/ absolute / metric / decimal}
-; #@! TF.CreationDate,2026-03-09T21:39:22+00:00
+; #@! TF.CreationDate,2026-03-09T21:53:45+00:00
 ; #@! TF.GenerationSoftware,Kicad,Pcbnew,9.0.7+1
 ; #@! TF.FileFunction,NonPlated,1,4,NPTH
 FMAT,2

mfg/fab/gerbers/Test_5--pth.drl

@@ -1,7 +1,7 @@
 M48
-; DRILL file {KiCad 9.0.7+1} date 2026-03-09T21:39:22+0000
+; DRILL file {KiCad 9.0.7+1} date 2026-03-09T21:53:45+0000
 ; FORMAT={-:-/ absolute / metric / decimal}
-; #@! TF.CreationDate,2026-03-09T21:39:22+00:00
+; #@! TF.CreationDate,2026-03-09T21:53:45+00:00
 ; #@! TF.GenerationSoftware,Kicad,Pcbnew,9.0.7+1
 ; #@! TF.FileFunction,Plated,1,4,PTH
 FMAT,2

mfg/jlcpcb/gerbers/Test_5-B_Cu.gbl

@@ -1,12 +1,12 @@
 %TF.GenerationSoftware,KiCad,Pcbnew,9.0.7+1*%
-%TF.CreationDate,2026-03-09T21:39:48+00:00*%
+%TF.CreationDate,2026-03-09T21:54:16+00:00*%
 %TF.ProjectId,Test_5,54657374-5f35-42e6-9b69-6361645f7063,NO_TAG+ (Unreleased)*%
 %TF.SameCoordinates,Original*%
 %TF.FileFunction,Copper,L4,Bot*%
 %TF.FilePolarity,Positive*%
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:39:48*
+G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:54:16*
 %MOMM*%
 %LPD*%
 G01*

mfg/jlcpcb/gerbers/Test_5-B_Mask.gbs

@@ -1,12 +1,12 @@
 %TF.GenerationSoftware,KiCad,Pcbnew,9.0.7+1*%
-%TF.CreationDate,2026-03-09T21:39:48+00:00*%
+%TF.CreationDate,2026-03-09T21:54:16+00:00*%
 %TF.ProjectId,Test_5,54657374-5f35-42e6-9b69-6361645f7063,NO_TAG+ (Unreleased)*%
 %TF.SameCoordinates,Original*%
 %TF.FileFunction,Soldermask,Bot*%
 %TF.FilePolarity,Negative*%
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:39:48*
+G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:54:16*
 %MOMM*%
 %LPD*%
 G01*

mfg/jlcpcb/gerbers/Test_5-B_Paste.gbp

@@ -1,12 +1,12 @@
 %TF.GenerationSoftware,KiCad,Pcbnew,9.0.7+1*%
-%TF.CreationDate,2026-03-09T21:39:48+00:00*%
+%TF.CreationDate,2026-03-09T21:54:16+00:00*%
 %TF.ProjectId,Test_5,54657374-5f35-42e6-9b69-6361645f7063,NO_TAG+ (Unreleased)*%
 %TF.SameCoordinates,Original*%
 %TF.FileFunction,Paste,Bot*%
 %TF.FilePolarity,Positive*%
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:39:48*
+G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:54:16*
 %MOMM*%
 %LPD*%
 G01*

mfg/jlcpcb/gerbers/Test_5-B_Silkscreen.gbo

@@ -1,12 +1,12 @@
 %TF.GenerationSoftware,KiCad,Pcbnew,9.0.7+1*%
-%TF.CreationDate,2026-03-09T21:39:48+00:00*%
+%TF.CreationDate,2026-03-09T21:54:16+00:00*%
 %TF.ProjectId,Test_5,54657374-5f35-42e6-9b69-6361645f7063,NO_TAG+ (Unreleased)*%
 %TF.SameCoordinates,Original*%
 %TF.FileFunction,Legend,Bot*%
 %TF.FilePolarity,Positive*%
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:39:48*
+G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:54:16*
 %MOMM*%
 %LPD*%
 G01*

mfg/jlcpcb/gerbers/Test_5-Edge_Cuts.gm1

@@ -1,11 +1,11 @@
 %TF.GenerationSoftware,KiCad,Pcbnew,9.0.7+1*%
-%TF.CreationDate,2026-03-09T21:39:48+00:00*%
+%TF.CreationDate,2026-03-09T21:54:16+00:00*%
 %TF.ProjectId,Test_5,54657374-5f35-42e6-9b69-6361645f7063,NO_TAG+ (Unreleased)*%
 %TF.SameCoordinates,Original*%
 %TF.FileFunction,Profile,NP*%
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:39:48*
+G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:54:16*
 %MOMM*%
 %LPD*%
 G01*

mfg/jlcpcb/gerbers/Test_5-F_Cu.gtl

@@ -1,12 +1,12 @@
 %TF.GenerationSoftware,KiCad,Pcbnew,9.0.7+1*%
-%TF.CreationDate,2026-03-09T21:39:48+00:00*%
+%TF.CreationDate,2026-03-09T21:54:16+00:00*%
 %TF.ProjectId,Test_5,54657374-5f35-42e6-9b69-6361645f7063,NO_TAG+ (Unreleased)*%
 %TF.SameCoordinates,Original*%
 %TF.FileFunction,Copper,L1,Top*%
 %TF.FilePolarity,Positive*%
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:39:48*
+G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:54:16*
 %MOMM*%
 %LPD*%
 G01*

mfg/jlcpcb/gerbers/Test_5-F_Mask.gts

@@ -1,12 +1,12 @@
 %TF.GenerationSoftware,KiCad,Pcbnew,9.0.7+1*%
-%TF.CreationDate,2026-03-09T21:39:48+00:00*%
+%TF.CreationDate,2026-03-09T21:54:16+00:00*%
 %TF.ProjectId,Test_5,54657374-5f35-42e6-9b69-6361645f7063,NO_TAG+ (Unreleased)*%
 %TF.SameCoordinates,Original*%
 %TF.FileFunction,Soldermask,Top*%
 %TF.FilePolarity,Negative*%
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:39:48*
+G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:54:16*
 %MOMM*%
 %LPD*%
 G01*

mfg/jlcpcb/gerbers/Test_5-F_Paste.gtp

@@ -1,12 +1,12 @@
 %TF.GenerationSoftware,KiCad,Pcbnew,9.0.7+1*%
-%TF.CreationDate,2026-03-09T21:39:48+00:00*%
+%TF.CreationDate,2026-03-09T21:54:16+00:00*%
 %TF.ProjectId,Test_5,54657374-5f35-42e6-9b69-6361645f7063,NO_TAG+ (Unreleased)*%
 %TF.SameCoordinates,Original*%
 %TF.FileFunction,Paste,Top*%
 %TF.FilePolarity,Positive*%
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:39:48*
+G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:54:16*
 %MOMM*%
 %LPD*%
 G01*

mfg/jlcpcb/gerbers/Test_5-F_Silkscreen.gto

@@ -1,12 +1,12 @@
 %TF.GenerationSoftware,KiCad,Pcbnew,9.0.7+1*%
-%TF.CreationDate,2026-03-09T21:39:48+00:00*%
+%TF.CreationDate,2026-03-09T21:54:16+00:00*%
 %TF.ProjectId,Test_5,54657374-5f35-42e6-9b69-6361645f7063,NO_TAG+ (Unreleased)*%
 %TF.SameCoordinates,Original*%
 %TF.FileFunction,Legend,Top*%
 %TF.FilePolarity,Positive*%
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:39:48*
+G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:54:16*
 %MOMM*%
 %LPD*%
 G01*

mfg/jlcpcb/gerbers/Test_5-In1_Cu.g1

@@ -1,12 +1,12 @@
 %TF.GenerationSoftware,KiCad,Pcbnew,9.0.7+1*%
-%TF.CreationDate,2026-03-09T21:39:48+00:00*%
+%TF.CreationDate,2026-03-09T21:54:16+00:00*%
 %TF.ProjectId,Test_5,54657374-5f35-42e6-9b69-6361645f7063,NO_TAG+ (Unreleased)*%
 %TF.SameCoordinates,Original*%
 %TF.FileFunction,Copper,L2,Inr*%
 %TF.FilePolarity,Positive*%
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:39:48*
+G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:54:16*
 %MOMM*%
 %LPD*%
 G01*

mfg/jlcpcb/gerbers/Test_5-In2_Cu.g2

@@ -1,12 +1,12 @@
 %TF.GenerationSoftware,KiCad,Pcbnew,9.0.7+1*%
-%TF.CreationDate,2026-03-09T21:39:48+00:00*%
+%TF.CreationDate,2026-03-09T21:54:16+00:00*%
 %TF.ProjectId,Test_5,54657374-5f35-42e6-9b69-6361645f7063,NO_TAG+ (Unreleased)*%
 %TF.SameCoordinates,Original*%
 %TF.FileFunction,Copper,L3,Inr*%
 %TF.FilePolarity,Positive*%
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:39:48*
+G04 Created by KiCad (PCBNEW 9.0.7+1) date 2026-03-09 21:54:16*
 %MOMM*%
 %LPD*%
 G01*