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jkrauss
2026-03-09 20:10:41 +00:00
committed by github-actions[bot]
parent a3443e4253
commit f677910580
56 changed files with 8787 additions and 8787 deletions
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@@ -15,7 +15,7 @@
(textvar (name "DWG_TITLE_PCB") "PCB, Assembly Name")
(textvar (name "DWG_TITLE_SCH") "Schematic, Assembly Name")
(textvar (name "FABRICATION_NOTES") "FABRICATION NOTES (UNLESS OTHERWISE SPECIFIED)\n\n1) FABRICATE PER IPC-6012A CLASS 2.\n\n2) OUTLINE DEFINED IN SEPARATE GERBER FILE WITH\n \"Edge_Cuts.GBR\" SUFFIX.\n\n3) SEE SEPARATE DRILL FILES WITH \".DRL\" SUFFIX \n FOR HOLE LOCATIONS.\n\n SELECTED HOLE LOCATIONS SHOWN ON THIS DRAWING \n FOR REFERENCE ONLY.\n\n4) SURFACE FINISH: HAL SNPB\n\n5) SOLDERMASK ON BOTH SIDES OF THE BOARD SHALL \n BE LPI, COLOR GREEN.\n\n6) SILK SCREEN LEGEND TO BE APPLIED PER LAYER \n STACKUP USING WHITE NON-CONDUCTIVE EPOXY INK.\n\n7) ALL VIAS ARE TENTED ON BOTH SIDES UNLESS \n SOLDERMASK OPENED IN GERBER.\n\n8) RESERVED\n\n9) PCB MATERIAL REQUIREMENTS:\n\n A. FLAMMABILITY RATING MUST MEET OR EXCEED \n UL94V-0 REQUIREMENTS.\n B. Tg 135 C OR EQUIVALENT.\n\n10) DESIGN GEOMETRY MINIMUM FEATURE SIZES:\n\n BOARD SIZE 46.000 × 27.500 mm\n BOARD THICKNESS 1.647 mm\n TRACE WIDTH 0.100 mm\n TRACE TO TRACE 0.200 mm\n MIN. HOLE (PTH) 0.300 mm\n MIN. HOLE (NPTH) 2.200 mm\n ANNULAR RING 0.150 mm\n COPPER TO HOLE 0.250 mm\n COPPER TO EDGE 0.500 mm\n HOLE TO HOLE 0.250 mm\n\n11) ALL DIMENSIONS ARE IN MILLIMETERS UNLESS OTHERWISE\n SPECIFIED.\n\n12) FOR REFERENCE ONLY THE STACKUP CORRESPONDS TO JLCPCB\n STACKUP JLC04161H-7628.\n FOR REFERENCE ONLY. IMPEDANCE IS THE CONTROLLING PARAMETER\n OVER LAYER STACKUP. GERBER DATA MAY NOT BE ALTERED EXCEPT\n FOR STANDARD FABRICATION ALLOWANCES.\n\n THE SUPPLIED ARTWORK MAY OR MAY NOT CONTAIN THE SPECIFIED\n TRACE GEOMETRIES ON EVERY LAYERS SPECIFIED.")
(textvar (name "GIT_HASH") "bc09ab2")
(textvar (name "GIT_HASH") "877e801")
(textvar (name "GIT_HASH_PCB") "d4182a9")
(textvar (name "GIT_HASH_SCH") "5caa450")
(textvar (name "GIT_URL") "/jkrauss/Test_4")