From 77ac90aac4a5017899311d7e15622bd709191851 Mon Sep 17 00:00:00 2001 From: "J.P. Krauss" Date: Tue, 10 Mar 2026 10:11:36 -0700 Subject: [PATCH] Update Schematic --- Test_6.kicad_pro | 26 +++++------------------- Test_6.kicad_sch | 52 +++++------------------------------------------- 2 files changed, 10 insertions(+), 68 deletions(-) diff --git a/Test_6.kicad_pro b/Test_6.kicad_pro index ff9d63d..3ca21e8 100644 --- a/Test_6.kicad_pro +++ b/Test_6.kicad_pro @@ -464,7 +464,7 @@ "pinned_symbol_libs": [] }, "meta": { - "filename": "Asymworks_Template.kicad_pro", + "filename": "Test_6.kicad_pro", "version": 3 }, "net_settings": { @@ -627,25 +627,9 @@ "8bfb0b6c-9e3a-4761-bc1e-4eb40915aa0b", "Root" ], - [ - "28ad8293-baaf-4ee1-8056-ad34096542a0", - "Block Diagram" - ], [ "f6afef58-d841-4ad6-baf9-746b0a35f011", - "Project Architecture" - ], - [ - "a5aa3c11-5084-4ea5-9da5-c9ff4a86f01f", - "Circuit 1" - ], - [ - "9da43fd7-7a0a-403c-bf2c-ba67cd8fa669", - "Circuit 2" - ], - [ - "6c8ce547-8e28-496a-9003-0e7dbfd93e8c", - "Circuit 3" + "Project" ], [ "20edd200-9383-4d87-bd58-f882adb4f112", @@ -664,7 +648,7 @@ "DWG_TITLE_ASSY": "PCB Assembly, Assembly Name", "DWG_TITLE_PCB": "PCB, Assembly Name", "DWG_TITLE_SCH": "Schematic, Assembly Name", - "FABRICATION_NOTES": "FABRICATION NOTES (UNLESS OTHERWISE SPECIFIED)\n\n1)\tFABRICATE PER IPC-6012A CLASS 2.\n\n2)\tOUTLINE DEFINED IN SEPARATE GERBER FILE WITH\n\t\"Edge_Cuts.GBR\" SUFFIX.\n\n3)\tSEE SEPARATE DRILL FILES WITH \".DRL\" SUFFIX \n\tFOR HOLE LOCATIONS.\n\n\tSELECTED HOLE LOCATIONS SHOWN ON THIS DRAWING \n\tFOR REFERENCE ONLY.\n\n4)\tSURFACE FINISH: ENIG\n\n5)\tSOLDERMASK ON BOTH SIDES OF THE BOARD SHALL \n\tBE LPI, COLOR GREEN.\n\n6)\tSILK SCREEN LEGEND TO BE APPLIED PER LAYER \n\tSTACKUP USING WHITE NON-CONDUCTIVE EPOXY INK.\n\n7)\tALL VIAS ARE TENTED ON BOTH SIDES UNLESS \n\tSOLDERMASK OPENED IN GERBER.\n\n8)\tRESERVED\n\n9)\tPCB MATERIAL REQUIREMENTS:\n\n\tA.\tFLAMMABILITY RATING MUST MEET OR EXCEED \n\t\tUL94V-0 REQUIREMENTS.\n\tB.\tTg 135 C OR EQUIVALENT.\n\n10)\tDESIGN GEOMETRY MINIMUM FEATURE SIZES:\n\n\tBOARD SIZE\t\t\t\tN/A \u00d7 N/A mm\n\tBOARD THICKNESS\t\t1.647 mm\n\tTRACE WIDTH\t\t\tN/A mm\n\tTRACE TO TRACE\t\t0.200 mm\n\tMIN. HOLE (PTH)\t\t\tN/A mm\n\tMIN. HOLE (NPTH)\t\tN/A mm\n\tANNULAR RING\t\t\tN/A mm\n\tCOPPER TO HOLE\t\t0.250 mm\n\tCOPPER TO EDGE\t\t0.500 mm\n\tHOLE TO HOLE\t\t\t0.250 mm\n\n11)\tALL DIMENSIONS ARE IN MILLIMETERS UNLESS OTHERWISE\n\tSPECIFIED.\n\n12)\tFOR REFERENCE ONLY THE STACKUP CORRESPONDS TO JLCPCB\n\tSTACKUP JLC04161H-7628.", + "FABRICATION_NOTES": "FABRICATION NOTES (UNLESS OTHERWISE SPECIFIED)\n\n1)\tFABRICATE PER IPC-6012A CLASS 2.\n\n2)\tOUTLINE DEFINED IN SEPARATE GERBER FILE WITH\n\t\"Edge_Cuts.GBR\" SUFFIX.\n\n3)\tSEE SEPARATE DRILL FILES WITH \".DRL\" SUFFIX \n\tFOR HOLE LOCATIONS.\n\n\tSELECTED HOLE LOCATIONS SHOWN ON THIS DRAWING \n\tFOR REFERENCE ONLY.\n\n4)\tSURFACE FINISH: ENIG\n\n5)\tSOLDERMASK ON BOTH SIDES OF THE BOARD SHALL \n\tBE LPI, COLOR GREEN.\n\n6)\tSILK SCREEN LEGEND TO BE APPLIED PER LAYER \n\tSTACKUP USING WHITE NON-CONDUCTIVE EPOXY INK.\n\n7)\tALL VIAS ARE TENTED ON BOTH SIDES UNLESS \n\tSOLDERMASK OPENED IN GERBER.\n\n8)\tRESERVED\n\n9)\tPCB MATERIAL REQUIREMENTS:\n\n\tA.\tFLAMMABILITY RATING MUST MEET OR EXCEED \n\t\tUL94V-0 REQUIREMENTS.\n\tB.\tTg 135 C OR EQUIVALENT.\n\n10)\tDESIGN GEOMETRY MINIMUM FEATURE SIZES:\n\n\tBOARD SIZE\t\t\t\tN/A × N/A mm\n\tBOARD THICKNESS\t\t1.647 mm\n\tTRACE WIDTH\t\t\tN/A mm\n\tTRACE TO TRACE\t\t0.200 mm\n\tMIN. HOLE (PTH)\t\t\tN/A mm\n\tMIN. HOLE (NPTH)\t\tN/A mm\n\tANNULAR RING\t\t\tN/A mm\n\tCOPPER TO HOLE\t\t0.250 mm\n\tCOPPER TO EDGE\t\t0.500 mm\n\tHOLE TO HOLE\t\t\t0.250 mm\n\n11)\tALL DIMENSIONS ARE IN MILLIMETERS UNLESS OTHERWISE\n\tSPECIFIED.\n\n12)\tFOR REFERENCE ONLY THE STACKUP CORRESPONDS TO JLCPCB\n\tSTACKUP JLC04161H-7628.", "GIT_HASH": "6f934d1", "GIT_HASH_PCB": "6f934d1", "GIT_HASH_SCH": "6f934d1", @@ -674,7 +658,7 @@ "RELEASE_STATE": "DRAFT", "REVISION": "NO_TAG+ (Unreleased)", "SCALE": "1:1", - "SCHEMATIC_NOTES": "Unless otherwise specified, components Values are in ohms, \u00b5F, and \u00b5H.", + "SCHEMATIC_NOTES": "Unless otherwise specified, components Values are in ohms, µF, and µH.", "SHEET_NAME_01": "Cover Page", "SHEET_NAME_02": "Block Diagram", "SHEET_NAME_03": "Project Architecture", @@ -698,4 +682,4 @@ "STATE": "TEMPLATE", "VARIANT": "" } -} \ No newline at end of file +} diff --git a/Test_6.kicad_sch b/Test_6.kicad_sch index f9b37c7..42db997 100644 --- a/Test_6.kicad_sch +++ b/Test_6.kicad_sch @@ -839,51 +839,9 @@ ) ) (instances - (project "Asymworks_Template" + (project "Test_6" (path "/8bfb0b6c-9e3a-4761-bc1e-4eb40915aa0b" - (page "7") - ) - ) - ) - ) - (sheet - (at 280.67 307.34) - (size 27.94 7.62) - (exclude_from_sim no) - (in_bom yes) - (on_board yes) - (dnp no) - (fields_autoplaced yes) - (stroke - (width 0.1524) - (type solid) - ) - (fill - (color 0 0 0 0.0000) - ) - (uuid "28ad8293-baaf-4ee1-8056-ad34096542a0") - (property "Sheetname" "Block Diagram" - (at 280.67 306.6284 0) - (effects - (font - (size 1.27 1.27) - ) - (justify left bottom) - ) - ) - (property "Sheetfile" "sheets/Block_Diagram.kicad_sch" - (at 280.67 315.5446 0) - (effects - (font - (size 1.27 1.27) - ) - (justify left top) - ) - ) - (instances - (project "Asymworks_Template" - (path "/8bfb0b6c-9e3a-4761-bc1e-4eb40915aa0b" - (page "2") + (page "3") ) ) ) @@ -904,7 +862,7 @@ (color 0 0 0 0.0000) ) (uuid "f6afef58-d841-4ad6-baf9-746b0a35f011") - (property "Sheetname" "Project Architecture" + (property "Sheetname" "Project" (at 322.58 306.6284 0) (effects (font @@ -923,9 +881,9 @@ ) ) (instances - (project "Asymworks_Template" + (project "Test_6" (path "/8bfb0b6c-9e3a-4761-bc1e-4eb40915aa0b" - (page "3") + (page "2") ) ) )