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Remove Parts List schematic sheet
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This commit is contained in:
Jonathan Krauss
2026-03-10 10:35:33 -07:00
parent dd8428c941
commit af8418247a
3 changed files with 4 additions and 83 deletions
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Test_6.kicad_pro
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@@ -630,10 +630,6 @@
[
"f6afef58-d841-4ad6-baf9-746b0a35f011",
"Project"
],
[
"20edd200-9383-4d87-bd58-f882adb4f112",
"Parts List"
]
],
"text_variables": {
@@ -648,8 +644,8 @@
"DWG_TITLE_ASSY": "PCB Assembly, Assembly Name",
"DWG_TITLE_PCB": "PCB, Assembly Name",
"DWG_TITLE_SCH": "Schematic, Assembly Name",
"FABRICATION_NOTES": "FABRICATION NOTES (UNLESS OTHERWISE SPECIFIED)\n\n1)\tFABRICATE PER IPC-6012A CLASS 2.\n\n2)\tOUTLINE DEFINED IN SEPARATE GERBER FILE WITH\n\t\"Edge_Cuts.GBR\" SUFFIX.\n\n3)\tSEE SEPARATE DRILL FILES WITH \".DRL\" SUFFIX \n\tFOR HOLE LOCATIONS.\n\n\tSELECTED HOLE LOCATIONS SHOWN ON THIS DRAWING \n\tFOR REFERENCE ONLY.\n\n4)\tSURFACE FINISH: ENIG\n\n5)\tSOLDERMASK ON BOTH SIDES OF THE BOARD SHALL \n\tBE LPI, COLOR GREEN.\n\n6)\tSILK SCREEN LEGEND TO BE APPLIED PER LAYER \n\tSTACKUP USING WHITE NON-CONDUCTIVE EPOXY INK.\n\n7)\tALL VIAS ARE TENTED ON BOTH SIDES UNLESS \n\tSOLDERMASK OPENED IN GERBER.\n\n8)\tRESERVED\n\n9)\tPCB MATERIAL REQUIREMENTS:\n\n\tA.\tFLAMMABILITY RATING MUST MEET OR EXCEED \n\t\tUL94V-0 REQUIREMENTS.\n\tB.\tTg 135 C OR EQUIVALENT.\n\n10)\tDESIGN GEOMETRY MINIMUM FEATURE SIZES:\n\n\tBOARD SIZE\t\t\t\tN/A \u00d7 N/A mm\n\tBOARD THICKNESS\t\t1.647 mm\n\tTRACE WIDTH\t\t\tN/A mm\n\tTRACE TO TRACE\t\t0.200 mm\n\tMIN. HOLE (PTH)\t\t\tN/A mm\n\tMIN. HOLE (NPTH)\t\tN/A mm\n\tANNULAR RING\t\t\tN/A mm\n\tCOPPER TO HOLE\t\t0.250 mm\n\tCOPPER TO EDGE\t\t0.500 mm\n\tHOLE TO HOLE\t\t\t0.250 mm\n\n11)\tALL DIMENSIONS ARE IN MILLIMETERS UNLESS OTHERWISE\n\tSPECIFIED.\n\n12)\tFOR REFERENCE ONLY THE STACKUP CORRESPONDS TO JLCPCB\n\tSTACKUP JLC04161H-7628.",
"GIT_HASH": "7a517a0",
"FABRICATION_NOTES": "FABRICATION NOTES (UNLESS OTHERWISE SPECIFIED)\n\n1)\tFABRICATE PER IPC-6012A CLASS 2.\n\n2)\tOUTLINE DEFINED IN SEPARATE GERBER FILE WITH\n\t\"Edge_Cuts.GBR\" SUFFIX.\n\n3)\tSEE SEPARATE DRILL FILES WITH \".DRL\" SUFFIX \n\tFOR HOLE LOCATIONS.\n\n\tSELECTED HOLE LOCATIONS SHOWN ON THIS DRAWING \n\tFOR REFERENCE ONLY.\n\n4)\tSURFACE FINISH: ENIG\n\n5)\tSOLDERMASK ON BOTH SIDES OF THE BOARD SHALL \n\tBE LPI, COLOR GREEN.\n\n6)\tSILK SCREEN LEGEND TO BE APPLIED PER LAYER \n\tSTACKUP USING WHITE NON-CONDUCTIVE EPOXY INK.\n\n7)\tALL VIAS ARE TENTED ON BOTH SIDES UNLESS \n\tSOLDERMASK OPENED IN GERBER.\n\n8)\tRESERVED\n\n9)\tPCB MATERIAL REQUIREMENTS:\n\n\tA.\tFLAMMABILITY RATING MUST MEET OR EXCEED \n\t\tUL94V-0 REQUIREMENTS.\n\tB.\tTg 135 C OR EQUIVALENT.\n\n10)\tDESIGN GEOMETRY MINIMUM FEATURE SIZES:\n\n\tBOARD SIZE\t\t\t\tN/A × N/A mm\n\tBOARD THICKNESS\t\t1.647 mm\n\tTRACE WIDTH\t\t\tN/A mm\n\tTRACE TO TRACE\t\t0.200 mm\n\tMIN. HOLE (PTH)\t\t\tN/A mm\n\tMIN. HOLE (NPTH)\t\tN/A mm\n\tANNULAR RING\t\t\tN/A mm\n\tCOPPER TO HOLE\t\t0.250 mm\n\tCOPPER TO EDGE\t\t0.500 mm\n\tHOLE TO HOLE\t\t\t0.250 mm\n\n11)\tALL DIMENSIONS ARE IN MILLIMETERS UNLESS OTHERWISE\n\tSPECIFIED.\n\n12)\tFOR REFERENCE ONLY THE STACKUP CORRESPONDS TO JLCPCB\n\tSTACKUP JLC04161H-7628.",
"GIT_HASH": "876e6c7",
"GIT_HASH_PCB": "6f934d1",
"GIT_HASH_SCH": "05925e2",
"GIT_URL": "/jkrauss/Test_4",
@@ -658,7 +654,7 @@
"RELEASE_STATE": "DRAFT",
"REVISION": "NO_TAG+ (Unreleased)",
"SCALE": "1:1",
"SCHEMATIC_NOTES": "Unless otherwise specified, components Values are in ohms, \u00b5F, and \u00b5H.",
"SCHEMATIC_NOTES": "Unless otherwise specified, components Values are in ohms, µF, and µH.",
"SHEET_NAME_01": "Cover Page",
"SHEET_NAME_02": "Project",
"SHEET_NAME_03": "Parts List",
@@ -682,4 +678,4 @@
"STATE": "TEMPLATE",
"VARIANT": ""
}
}
}