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jkrauss
2026-03-10 16:53:01 +00:00
committed by github-actions[bot]
parent 6f934d1d19
commit d9ca01a482
18 changed files with 6700 additions and 17 deletions
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Test_6.kicad_pro
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@@ -653,25 +653,28 @@
]
],
"text_variables": {
"ASSEMBLY_NAME": "",
"ASSEMBLY_NUMBER": "",
"ASSEMBLY_SCALE": "",
"ASSEMBLY_NAME": "Assembly Name",
"ASSEMBLY_NOTES": "ASSEMBLY NOTES (UNLESS OTHERWISE SPECIFIED)\n\n1)\tDO NOT POPULATE COMPONENTS ARE MARKED WITH A RED CROSS\n\n2)\tDO NOT POPULATE COMPONENTS ARE NOT PRESENT IN THE BOM\n\n3)\tIF CONFLICTING INFORMATION IS FOUND BETWEEN THE ASSEMBLY\n\tFILE AND BOM, BOM SHOULD BE USED AS THE MAIN SOURCE.\n\n4)\tDOT IDENTIFIES PIN #1 LOCATION AND DEVICE ORIENTATION\n\tWHEN VIEWED FROM THE TOP.",
"ASSEMBLY_NUMBER": "A99-9000",
"ASSEMBLY_SCALE": "1",
"COMPANY": "Asymworks, LLC",
"DESIGNER": "JPK",
"DWG_NUMBER_PCB": "",
"DWG_NUMBER_SCH": "",
"DWG_TITLE_ASSY": "",
"DWG_TITLE_PCB": "",
"DWG_TITLE_SCH": "",
"GIT_HASH": "",
"GIT_HASH_PCB": "",
"GIT_HASH_SCH": "",
"GIT_URL": "",
"PROJECT_CODE": "",
"RELEASE_DATE": "",
"RELEASE_STATE": "",
"REVISION": "${REVISION}",
"DWG_NUMBER_PCB": "P99-9000",
"DWG_NUMBER_SCH": "S99-9000",
"DWG_TITLE_ASSY": "PCB Assembly, Assembly Name",
"DWG_TITLE_PCB": "PCB, Assembly Name",
"DWG_TITLE_SCH": "Schematic, Assembly Name",
"FABRICATION_NOTES": "FABRICATION NOTES (UNLESS OTHERWISE SPECIFIED)\n\n1)\tFABRICATE PER IPC-6012A CLASS 2.\n\n2)\tOUTLINE DEFINED IN SEPARATE GERBER FILE WITH\n\t\"Edge_Cuts.GBR\" SUFFIX.\n\n3)\tSEE SEPARATE DRILL FILES WITH \".DRL\" SUFFIX \n\tFOR HOLE LOCATIONS.\n\n\tSELECTED HOLE LOCATIONS SHOWN ON THIS DRAWING \n\tFOR REFERENCE ONLY.\n\n4)\tSURFACE FINISH: ENIG\n\n5)\tSOLDERMASK ON BOTH SIDES OF THE BOARD SHALL \n\tBE LPI, COLOR GREEN.\n\n6)\tSILK SCREEN LEGEND TO BE APPLIED PER LAYER \n\tSTACKUP USING WHITE NON-CONDUCTIVE EPOXY INK.\n\n7)\tALL VIAS ARE TENTED ON BOTH SIDES UNLESS \n\tSOLDERMASK OPENED IN GERBER.\n\n8)\tRESERVED\n\n9)\tPCB MATERIAL REQUIREMENTS:\n\n\tA.\tFLAMMABILITY RATING MUST MEET OR EXCEED \n\t\tUL94V-0 REQUIREMENTS.\n\tB.\tTg 135 C OR EQUIVALENT.\n\n10)\tDESIGN GEOMETRY MINIMUM FEATURE SIZES:\n\n\tBOARD SIZE\t\t\t\tN/A \u00d7 N/A mm\n\tBOARD THICKNESS\t\t1.647 mm\n\tTRACE WIDTH\t\t\tN/A mm\n\tTRACE TO TRACE\t\t0.200 mm\n\tMIN. HOLE (PTH)\t\t\tN/A mm\n\tMIN. HOLE (NPTH)\t\tN/A mm\n\tANNULAR RING\t\t\tN/A mm\n\tCOPPER TO HOLE\t\t0.250 mm\n\tCOPPER TO EDGE\t\t0.500 mm\n\tHOLE TO HOLE\t\t\t0.250 mm\n\n11)\tALL DIMENSIONS ARE IN MILLIMETERS UNLESS OTHERWISE\n\tSPECIFIED.\n\n12)\tFOR REFERENCE ONLY THE STACKUP CORRESPONDS TO JLCPCB\n\tSTACKUP JLC04161H-7628.",
"GIT_HASH": "6f934d1",
"GIT_HASH_PCB": "6f934d1",
"GIT_HASH_SCH": "6f934d1",
"GIT_URL": "/jkrauss/Test_4",
"PROJECT_CODE": "P99",
"RELEASE_DATE": "2026-03-10",
"RELEASE_STATE": "DRAFT",
"REVISION": "NO_TAG+ (Unreleased)",
"SCALE": "1:1",
"SCHEMATIC_NOTES": "Unless otherwise specified, components Values are in ohms, \u00b5F, and \u00b5H.",
"SHEET_NAME_01": "Cover Page",
"SHEET_NAME_02": "Block Diagram",
"SHEET_NAME_03": "Project Architecture",
@@ -695,4 +698,4 @@
"STATE": "TEMPLATE",
"VARIANT": ""
}
}
}