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Author SHA1 Message Date
jkrauss
ec9b2c415c [bot]: Update Outputs 2026-03-10 17:37:18 +00:00
af8418247a Remove Parts List schematic sheet
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2026-03-10 10:36:31 -07:00
jkrauss
dd8428c941 [bot]: Update Outputs 2026-03-10 17:23:19 +00:00
7a517a09ca Generate CSV BOM table
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2026-03-10 10:22:33 -07:00
jkrauss
8272434110 [bot]: Update Outputs 2026-03-10 17:20:38 +00:00
876e6c740b Try CSV BOM Table
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2026-03-10 10:19:51 -07:00
jkrauss
cdb4e08cf3 [bot]: Update Outputs 2026-03-10 17:18:11 +00:00
05925e276e Full Update
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2026-03-10 10:17:26 -07:00
52b37ed0f3 Add missing sheet
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2026-03-10 10:15:41 -07:00
e2c3c73e81 Remove old XML file
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2026-03-10 10:13:12 -07:00
77ac90aac4 Update Schematic
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2026-03-10 10:11:36 -07:00
b3a735d596 Update CI Workflow
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2026-03-10 10:05:47 -07:00
3494b9f03d Add Parts List Table to Schematic
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2026-03-10 10:01:50 -07:00
4a6d3b0440 Update .gitignore 2026-03-10 09:57:11 -07:00
jkrauss
d9ca01a482 [bot]: Update Outputs 2026-03-10 16:53:01 +00:00
6f934d1d19 Rename Project
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2026-03-10 09:52:26 -07:00
a0725ade6d [bootstrap] Add subtree 'Asymworks/KiCad-Library' at 'lib/asymworks' 2026-03-10 09:52:25 -07:00
f24778b826 Squashed 'lib/asymworks/' content from commit f94343b
git-subtree-dir: lib/asymworks
git-subtree-split: f94343beb3f0984fe1cd815fc09f6fcdd6189bd6
2026-03-10 09:52:25 -07:00
111 changed files with 1019155 additions and 351 deletions

7
.gitattributes vendored Normal file
View File

@@ -0,0 +1,7 @@
*.csv filter=bom_csv
*.html filter=bom_html
*.gbr filter=gerber
*.gbrjob filter=gbrjob
*.xml filter=xml
*.kicad_pcb filter=kicad_pcb_f
*.net filter=net_filter

20
.gitconfig Normal file
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@@ -0,0 +1,20 @@
[filter "bom_csv"]
clean = sed -E 's/^BoM Date:.*$/BoM Date:Date/'
smudge = sed -E \"s/BoM Date:Date/BoM Date:,`date +\\\"%a %d %b %Y %X %:::z\\\"`/\"
[filter "bom_html"]
clean = sed -E 's/^<tr><td>BoM Date<\\/td><td>.*$/<tr><td>BoM Date<\\/td><td>Date<\\/td><\\/tr>/'
smudge = sed -E \"s/<tr><td>BoM Date<\\/td><td>Date<\\/td><\\/tr>/<tr><td>BoM Date<\\/td><td>`date +\\\"%a %d %b %Y %X %:::z\\\"`<\\/td><\\/tr>/\"
[filter "gerber"]
clean = sed -E -e 's/^%TF.CreationDate,.*$/%TF.CreationDate,Date%/' -e 's/^G04 Created by KiCad.*$/G04 Created by KiCad*/'
smudge = sed -E \"s/%TF.CreationDate,Date%/%TF.CreationDate,`date +%Y-%m-%dT%H:%M:%S%:z`/\"
[filter "gbrjob"]
clean = sed -E 's/\"CreationDate\":.*/\"CreationDate\": \"Date\"/'
smudge = sed -E \"s/\\\"CreationDate\\\": \\\"Date\\\"/\\\"CreationDate\\\": \\\"`date +%Y-%m-%dT%H:%M:%S%:z`\\\"/\"
[filter "xml"]
clean = sed -E -e 's/^ <date>.*<\\/date>/ <date>Date2<\\/date>/' -e 's/^ <date>.*<\\/date>/ <date>Date1<\\/date>/'
smudge = sed -E -e \"s/<date>Date1<\\/date>/<date>`date +\\\"%a %d %b %Y %X %:::z\\\"`<\\/date>/\" -e \"s/<date>Date2<\\/date>/<date>`date +\\\"%Y-%m-%d\\\"`<\\/date>/\"
[filter "kicad_pcb_f"]
clean = sed -E 's/\\(host pcbnew ([[:digit:]]+\\.[[:digit:]]+\\.[[:digit:]]+).*/\\(host pcbnew \\1\\)/'
[filter "net_filter"]
clean = sed -E -e 's/\\(date \\\".*\\\"\\)/\\(date \\\"Date\\\"\\)/'
smudge = sed -E -e \"s/\\(date \\\"Date\\\"\\)/\\(date \\\"`date +\\\"%a %d %b %Y %X %:::z\\\"`\\\"\\)/\"

View File

@@ -193,23 +193,23 @@ jobs:
branch: ${{ github.ref_name }} branch: ${{ github.ref_name }}
commit_message: '[bot]: Update Outputs' commit_message: '[bot]: Update Outputs'
- name: Upload XML Update Log
if: ${{ always() }}
uses: christopherhx/gitea-upload-artifact@v4
with:
name: log_file_xml
path: kibot_run_xml.log
- name: Upload Preprocessing Log
if: ${{ always() }}
uses: christopherhx/gitea-upload-artifact@v4
with:
name: log_file_preprocess
path: kibot_run_preprocess.log
- name: Upload KiBot Log - name: Upload KiBot Log
if: ${{ always() }} if: ${{ always() }}
uses: christopherhx/gitea-upload-artifact@v4 uses: christopherhx/gitea-upload-artifact@v4
with: with:
name: log_file_kibot name: log_file_kibot
path: ${{ env.kibot_log }} path: ${{ env.kibot_log }}
- name: Upload Drawing Notes Log
if: ${{ always() && env.kibot_stage != 'DRAFT' }}
uses: christopherhx/gitea-upload-artifact@v4
with:
name: log_file_notes
path: kibot_run_notes.log
- name: Upload README Log
if: ${{ always() && env.kibot_stage == 'DRAFT' }}
uses: christopherhx/gitea-upload-artifact@v4
with:
name: log_file_readme
path: kibot_run_readme.log

2
.gitignore vendored
View File

@@ -15,7 +15,7 @@ kibot_*.kicad_pcb
kibot_*.kicad_dru kibot_*.kicad_dru
kibot_*.kicad_prl kibot_*.kicad_prl
kibot_*.kicad_pro kibot_*.kicad_pro
kibot_run.log kibot*.log
pcbnew.kicad_wks pcbnew.kicad_wks
schematic.kicad_wks schematic.kicad_wks
kibot/cache/ kibot/cache/

85
Test_6-netlist.net Normal file
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@@ -0,0 +1,85 @@
(export (version "E")
(design
(source "/workspace/jkrauss/Test_6/Test_6.kicad_sch")
(date "Date")
(tool "Eeschema 9.0.7+1")
(textvar (name "ASSEMBLY_NAME") "Assembly Name")
(textvar (name "ASSEMBLY_NOTES") "ASSEMBLY NOTES (UNLESS OTHERWISE SPECIFIED)\n\n1) DO NOT POPULATE COMPONENTS ARE MARKED WITH A RED CROSS\n\n2) DO NOT POPULATE COMPONENTS ARE NOT PRESENT IN THE BOM\n\n3) IF CONFLICTING INFORMATION IS FOUND BETWEEN THE ASSEMBLY\n FILE AND BOM, BOM SHOULD BE USED AS THE MAIN SOURCE.\n\n4) DOT IDENTIFIES PIN #1 LOCATION AND DEVICE ORIENTATION\n WHEN VIEWED FROM THE TOP.")
(textvar (name "ASSEMBLY_NUMBER") "A99-9000")
(textvar (name "ASSEMBLY_SCALE") "1")
(textvar (name "COMPANY") "Asymworks, LLC")
(textvar (name "DESIGNER") "JPK")
(textvar (name "DWG_NUMBER_PCB") "P99-9000")
(textvar (name "DWG_NUMBER_SCH") "S99-9000")
(textvar (name "DWG_TITLE_ASSY") "PCB Assembly, Assembly Name")
(textvar (name "DWG_TITLE_PCB") "PCB, Assembly Name")
(textvar (name "DWG_TITLE_SCH") "Schematic, Assembly Name")
(textvar (name "FABRICATION_NOTES") "FABRICATION NOTES (UNLESS OTHERWISE SPECIFIED)\n\n1) FABRICATE PER IPC-6012A CLASS 2.\n\n2) OUTLINE DEFINED IN SEPARATE GERBER FILE WITH\n \"Edge_Cuts.GBR\" SUFFIX.\n\n3) SEE SEPARATE DRILL FILES WITH \".DRL\" SUFFIX \n FOR HOLE LOCATIONS.\n\n SELECTED HOLE LOCATIONS SHOWN ON THIS DRAWING \n FOR REFERENCE ONLY.\n\n4) SURFACE FINISH: ENIG\n\n5) SOLDERMASK ON BOTH SIDES OF THE BOARD SHALL \n BE LPI, COLOR GREEN.\n\n6) SILK SCREEN LEGEND TO BE APPLIED PER LAYER \n STACKUP USING WHITE NON-CONDUCTIVE EPOXY INK.\n\n7) ALL VIAS ARE TENTED ON BOTH SIDES UNLESS \n SOLDERMASK OPENED IN GERBER.\n\n8) RESERVED\n\n9) PCB MATERIAL REQUIREMENTS:\n\n A. FLAMMABILITY RATING MUST MEET OR EXCEED \n UL94V-0 REQUIREMENTS.\n B. Tg 135 C OR EQUIVALENT.\n\n10) DESIGN GEOMETRY MINIMUM FEATURE SIZES:\n\n BOARD SIZE N/A × N/A mm\n BOARD THICKNESS 1.647 mm\n TRACE WIDTH N/A mm\n TRACE TO TRACE 0.200 mm\n MIN. HOLE (PTH) N/A mm\n MIN. HOLE (NPTH) N/A mm\n ANNULAR RING N/A mm\n COPPER TO HOLE 0.250 mm\n COPPER TO EDGE 0.500 mm\n HOLE TO HOLE 0.250 mm\n\n11) ALL DIMENSIONS ARE IN MILLIMETERS UNLESS OTHERWISE\n SPECIFIED.\n\n12) FOR REFERENCE ONLY THE STACKUP CORRESPONDS TO JLCPCB\n STACKUP JLC04161H-7628.")
(textvar (name "GIT_HASH") "af84182")
(textvar (name "GIT_HASH_PCB") "6f934d1")
(textvar (name "GIT_HASH_SCH") "af84182")
(textvar (name "GIT_URL") "/jkrauss/Test_4")
(textvar (name "PROJECT_CODE") "P99")
(textvar (name "RELEASE_DATE") "2026-03-10")
(textvar (name "RELEASE_STATE") "DRAFT")
(textvar (name "REVISION") "NO_TAG+ (Unreleased)")
(textvar (name "SCALE") "1:1")
(textvar (name "SCHEMATIC_NOTES") "Unless otherwise specified, components Values are in ohms, µF, and µH.")
(textvar (name "SHEET_NAME_01") "Cover Page")
(textvar (name "SHEET_NAME_02") "Project")
(textvar (name "SHEET_NAME_03") "......................................")
(textvar (name "SHEET_NAME_04") "......................................")
(textvar (name "SHEET_NAME_05") "......................................")
(textvar (name "SHEET_NAME_06") "......................................")
(textvar (name "SHEET_NAME_07") "......................................")
(textvar (name "SHEET_NAME_08") "......................................")
(textvar (name "SHEET_NAME_09") "......................................")
(textvar (name "SHEET_NAME_10") "......................................")
(textvar (name "SHEET_NAME_11") "......................................")
(textvar (name "SHEET_NAME_12") "......................................")
(textvar (name "SHEET_NAME_13") "......................................")
(textvar (name "SHEET_NAME_14") "......................................")
(textvar (name "SHEET_NAME_15") "......................................")
(textvar (name "SHEET_NAME_16") "......................................")
(textvar (name "SHEET_NAME_17") "......................................")
(textvar (name "SHEET_NAME_18") "......................................")
(textvar (name "SHEET_NAME_19") "......................................")
(textvar (name "SHEET_NAME_20") "......................................")
(textvar (name "STATE") "TEMPLATE")
(textvar (name "VARIANT"))
(sheet (number "1") (name "/") (tstamps "/")
(title_block
(title "Title Page")
(company "Asymworks, LLC")
(rev "NO_TAG+ (Unreleased)")
(date)
(source "Test_6.kicad_sch")
(comment (number "1") (value ""))
(comment (number "2") (value ""))
(comment (number "3") (value ""))
(comment (number "4") (value ""))
(comment (number "5") (value ""))
(comment (number "6") (value ""))
(comment (number "7") (value ""))
(comment (number "8") (value ""))
(comment (number "9") (value ""))))
(sheet (number "2") (name "/Project/") (tstamps "/f6afef58-d841-4ad6-baf9-746b0a35f011/")
(title_block
(title)
(company)
(rev)
(date)
(source "Project.kicad_sch")
(comment (number "1") (value ""))
(comment (number "2") (value ""))
(comment (number "3") (value ""))
(comment (number "4") (value ""))
(comment (number "5") (value ""))
(comment (number "6") (value ""))
(comment (number "7") (value ""))
(comment (number "8") (value ""))
(comment (number "9") (value "")))))
(components)
(libparts)
(libraries)
(nets))

View File

@@ -464,7 +464,7 @@
"pinned_symbol_libs": [] "pinned_symbol_libs": []
}, },
"meta": { "meta": {
"filename": "Asymworks_Template.kicad_pro", "filename": "Test_6.kicad_pro",
"version": 3 "version": 3
}, },
"net_settings": { "net_settings": {
@@ -627,58 +627,41 @@
"8bfb0b6c-9e3a-4761-bc1e-4eb40915aa0b", "8bfb0b6c-9e3a-4761-bc1e-4eb40915aa0b",
"Root" "Root"
], ],
[
"28ad8293-baaf-4ee1-8056-ad34096542a0",
"Block Diagram"
],
[ [
"f6afef58-d841-4ad6-baf9-746b0a35f011", "f6afef58-d841-4ad6-baf9-746b0a35f011",
"Project Architecture" "Project"
],
[
"a5aa3c11-5084-4ea5-9da5-c9ff4a86f01f",
"Circuit 1"
],
[
"9da43fd7-7a0a-403c-bf2c-ba67cd8fa669",
"Circuit 2"
],
[
"6c8ce547-8e28-496a-9003-0e7dbfd93e8c",
"Circuit 3"
],
[
"20edd200-9383-4d87-bd58-f882adb4f112",
"Parts List"
] ]
], ],
"text_variables": { "text_variables": {
"ASSEMBLY_NAME": "", "ASSEMBLY_NAME": "Assembly Name",
"ASSEMBLY_NUMBER": "", "ASSEMBLY_NOTES": "ASSEMBLY NOTES (UNLESS OTHERWISE SPECIFIED)\n\n1)\tDO NOT POPULATE COMPONENTS ARE MARKED WITH A RED CROSS\n\n2)\tDO NOT POPULATE COMPONENTS ARE NOT PRESENT IN THE BOM\n\n3)\tIF CONFLICTING INFORMATION IS FOUND BETWEEN THE ASSEMBLY\n\tFILE AND BOM, BOM SHOULD BE USED AS THE MAIN SOURCE.\n\n4)\tDOT IDENTIFIES PIN #1 LOCATION AND DEVICE ORIENTATION\n\tWHEN VIEWED FROM THE TOP.",
"ASSEMBLY_SCALE": "", "ASSEMBLY_NUMBER": "A99-9000",
"ASSEMBLY_SCALE": "1",
"COMPANY": "Asymworks, LLC", "COMPANY": "Asymworks, LLC",
"DESIGNER": "JPK", "DESIGNER": "JPK",
"DWG_NUMBER_PCB": "", "DWG_NUMBER_PCB": "P99-9000",
"DWG_NUMBER_SCH": "", "DWG_NUMBER_SCH": "S99-9000",
"DWG_TITLE_ASSY": "", "DWG_TITLE_ASSY": "PCB Assembly, Assembly Name",
"DWG_TITLE_PCB": "", "DWG_TITLE_PCB": "PCB, Assembly Name",
"DWG_TITLE_SCH": "", "DWG_TITLE_SCH": "Schematic, Assembly Name",
"GIT_HASH": "", "FABRICATION_NOTES": "FABRICATION NOTES (UNLESS OTHERWISE SPECIFIED)\n\n1)\tFABRICATE PER IPC-6012A CLASS 2.\n\n2)\tOUTLINE DEFINED IN SEPARATE GERBER FILE WITH\n\t\"Edge_Cuts.GBR\" SUFFIX.\n\n3)\tSEE SEPARATE DRILL FILES WITH \".DRL\" SUFFIX \n\tFOR HOLE LOCATIONS.\n\n\tSELECTED HOLE LOCATIONS SHOWN ON THIS DRAWING \n\tFOR REFERENCE ONLY.\n\n4)\tSURFACE FINISH: ENIG\n\n5)\tSOLDERMASK ON BOTH SIDES OF THE BOARD SHALL \n\tBE LPI, COLOR GREEN.\n\n6)\tSILK SCREEN LEGEND TO BE APPLIED PER LAYER \n\tSTACKUP USING WHITE NON-CONDUCTIVE EPOXY INK.\n\n7)\tALL VIAS ARE TENTED ON BOTH SIDES UNLESS \n\tSOLDERMASK OPENED IN GERBER.\n\n8)\tRESERVED\n\n9)\tPCB MATERIAL REQUIREMENTS:\n\n\tA.\tFLAMMABILITY RATING MUST MEET OR EXCEED \n\t\tUL94V-0 REQUIREMENTS.\n\tB.\tTg 135 C OR EQUIVALENT.\n\n10)\tDESIGN GEOMETRY MINIMUM FEATURE SIZES:\n\n\tBOARD SIZE\t\t\t\tN/A \u00d7 N/A mm\n\tBOARD THICKNESS\t\t1.647 mm\n\tTRACE WIDTH\t\t\tN/A mm\n\tTRACE TO TRACE\t\t0.200 mm\n\tMIN. HOLE (PTH)\t\t\tN/A mm\n\tMIN. HOLE (NPTH)\t\tN/A mm\n\tANNULAR RING\t\t\tN/A mm\n\tCOPPER TO HOLE\t\t0.250 mm\n\tCOPPER TO EDGE\t\t0.500 mm\n\tHOLE TO HOLE\t\t\t0.250 mm\n\n11)\tALL DIMENSIONS ARE IN MILLIMETERS UNLESS OTHERWISE\n\tSPECIFIED.\n\n12)\tFOR REFERENCE ONLY THE STACKUP CORRESPONDS TO JLCPCB\n\tSTACKUP JLC04161H-7628.",
"GIT_HASH_PCB": "", "GIT_HASH": "af84182",
"GIT_HASH_SCH": "", "GIT_HASH_PCB": "6f934d1",
"GIT_URL": "", "GIT_HASH_SCH": "af84182",
"PROJECT_CODE": "", "GIT_URL": "/jkrauss/Test_4",
"RELEASE_DATE": "", "PROJECT_CODE": "P99",
"RELEASE_STATE": "", "RELEASE_DATE": "2026-03-10",
"REVISION": "${REVISION}", "RELEASE_STATE": "DRAFT",
"REVISION": "NO_TAG+ (Unreleased)",
"SCALE": "1:1", "SCALE": "1:1",
"SCHEMATIC_NOTES": "Unless otherwise specified, components Values are in ohms, \u00b5F, and \u00b5H.",
"SHEET_NAME_01": "Cover Page", "SHEET_NAME_01": "Cover Page",
"SHEET_NAME_02": "Block Diagram", "SHEET_NAME_02": "Project",
"SHEET_NAME_03": "Project Architecture", "SHEET_NAME_03": "......................................",
"SHEET_NAME_04": "Circuit 1", "SHEET_NAME_04": "......................................",
"SHEET_NAME_05": "Circuit 2", "SHEET_NAME_05": "......................................",
"SHEET_NAME_06": "Circuit 3", "SHEET_NAME_06": "......................................",
"SHEET_NAME_07": "Parts List", "SHEET_NAME_07": "......................................",
"SHEET_NAME_08": "......................................", "SHEET_NAME_08": "......................................",
"SHEET_NAME_09": "......................................", "SHEET_NAME_09": "......................................",
"SHEET_NAME_10": "......................................", "SHEET_NAME_10": "......................................",

View File

@@ -804,90 +804,6 @@
) )
(uuid "f455215d-ebdc-4ea9-9798-407046434784") (uuid "f455215d-ebdc-4ea9-9798-407046434784")
) )
(sheet
(at 364.49 307.34)
(size 27.94 7.62)
(exclude_from_sim no)
(in_bom yes)
(on_board yes)
(dnp no)
(fields_autoplaced yes)
(stroke
(width 0.1524)
(type solid)
)
(fill
(color 0 0 0 0.0000)
)
(uuid "20edd200-9383-4d87-bd58-f882adb4f112")
(property "Sheetname" "Parts List"
(at 364.49 306.6284 0)
(effects
(font
(size 1.27 1.27)
)
(justify left bottom)
)
)
(property "Sheetfile" "sheets/Parts_List.kicad_sch"
(at 364.49 315.5446 0)
(effects
(font
(size 1.27 1.27)
)
(justify left top)
)
)
(instances
(project "Asymworks_Template"
(path "/8bfb0b6c-9e3a-4761-bc1e-4eb40915aa0b"
(page "7")
)
)
)
)
(sheet
(at 280.67 307.34)
(size 27.94 7.62)
(exclude_from_sim no)
(in_bom yes)
(on_board yes)
(dnp no)
(fields_autoplaced yes)
(stroke
(width 0.1524)
(type solid)
)
(fill
(color 0 0 0 0.0000)
)
(uuid "28ad8293-baaf-4ee1-8056-ad34096542a0")
(property "Sheetname" "Block Diagram"
(at 280.67 306.6284 0)
(effects
(font
(size 1.27 1.27)
)
(justify left bottom)
)
)
(property "Sheetfile" "sheets/Block_Diagram.kicad_sch"
(at 280.67 315.5446 0)
(effects
(font
(size 1.27 1.27)
)
(justify left top)
)
)
(instances
(project "Asymworks_Template"
(path "/8bfb0b6c-9e3a-4761-bc1e-4eb40915aa0b"
(page "2")
)
)
)
)
(sheet (sheet
(at 322.58 307.34) (at 322.58 307.34)
(size 27.94 7.62) (size 27.94 7.62)
@@ -904,7 +820,7 @@
(color 0 0 0 0.0000) (color 0 0 0 0.0000)
) )
(uuid "f6afef58-d841-4ad6-baf9-746b0a35f011") (uuid "f6afef58-d841-4ad6-baf9-746b0a35f011")
(property "Sheetname" "Project Architecture" (property "Sheetname" "Project"
(at 322.58 306.6284 0) (at 322.58 306.6284 0)
(effects (effects
(font (font
@@ -913,7 +829,7 @@
(justify left bottom) (justify left bottom)
) )
) )
(property "Sheetfile" "sheets/Architecture.kicad_sch" (property "Sheetfile" "sheets/Project.kicad_sch"
(at 322.58 315.5446 0) (at 322.58 315.5446 0)
(effects (effects
(font (font
@@ -923,9 +839,9 @@
) )
) )
(instances (instances
(project "Asymworks_Template" (project "Test_6"
(path "/8bfb0b6c-9e3a-4761-bc1e-4eb40915aa0b" (path "/8bfb0b6c-9e3a-4761-bc1e-4eb40915aa0b"
(page "3") (page "2")
) )
) )
) )

151
Test_6.xml Normal file
View File

@@ -0,0 +1,151 @@
<?xml version="1.0" encoding="UTF-8"?>
<export version="E">
<design>
<source>/workspace/jkrauss/Test_6/Test_6.kicad_sch</source>
<date>Date1</date>
<tool>Eeschema 9.0.7+1</tool>
<textvar name="ASSEMBLY_NAME">Assembly Name</textvar>
<textvar name="ASSEMBLY_NOTES">ASSEMBLY NOTES (UNLESS OTHERWISE SPECIFIED)
1) DO NOT POPULATE COMPONENTS ARE MARKED WITH A RED CROSS
2) DO NOT POPULATE COMPONENTS ARE NOT PRESENT IN THE BOM
3) IF CONFLICTING INFORMATION IS FOUND BETWEEN THE ASSEMBLY
FILE AND BOM, BOM SHOULD BE USED AS THE MAIN SOURCE.
4) DOT IDENTIFIES PIN #1 LOCATION AND DEVICE ORIENTATION
WHEN VIEWED FROM THE TOP.</textvar>
<textvar name="ASSEMBLY_NUMBER">A99-9000</textvar>
<textvar name="ASSEMBLY_SCALE">1</textvar>
<textvar name="COMPANY">Asymworks, LLC</textvar>
<textvar name="DESIGNER">JPK</textvar>
<textvar name="DWG_NUMBER_PCB">P99-9000</textvar>
<textvar name="DWG_NUMBER_SCH">S99-9000</textvar>
<textvar name="DWG_TITLE_ASSY">PCB Assembly, Assembly Name</textvar>
<textvar name="DWG_TITLE_PCB">PCB, Assembly Name</textvar>
<textvar name="DWG_TITLE_SCH">Schematic, Assembly Name</textvar>
<textvar name="FABRICATION_NOTES">FABRICATION NOTES (UNLESS OTHERWISE SPECIFIED)
1) FABRICATE PER IPC-6012A CLASS 2.
2) OUTLINE DEFINED IN SEPARATE GERBER FILE WITH
"Edge_Cuts.GBR" SUFFIX.
3) SEE SEPARATE DRILL FILES WITH ".DRL" SUFFIX
FOR HOLE LOCATIONS.
SELECTED HOLE LOCATIONS SHOWN ON THIS DRAWING
FOR REFERENCE ONLY.
4) SURFACE FINISH: ENIG
5) SOLDERMASK ON BOTH SIDES OF THE BOARD SHALL
BE LPI, COLOR GREEN.
6) SILK SCREEN LEGEND TO BE APPLIED PER LAYER
STACKUP USING WHITE NON-CONDUCTIVE EPOXY INK.
7) ALL VIAS ARE TENTED ON BOTH SIDES UNLESS
SOLDERMASK OPENED IN GERBER.
8) RESERVED
9) PCB MATERIAL REQUIREMENTS:
A. FLAMMABILITY RATING MUST MEET OR EXCEED
UL94V-0 REQUIREMENTS.
B. Tg 135 C OR EQUIVALENT.
10) DESIGN GEOMETRY MINIMUM FEATURE SIZES:
BOARD SIZE N/A × N/A mm
BOARD THICKNESS 1.647 mm
TRACE WIDTH N/A mm
TRACE TO TRACE 0.200 mm
MIN. HOLE (PTH) N/A mm
MIN. HOLE (NPTH) N/A mm
ANNULAR RING N/A mm
COPPER TO HOLE 0.250 mm
COPPER TO EDGE 0.500 mm
HOLE TO HOLE 0.250 mm
11) ALL DIMENSIONS ARE IN MILLIMETERS UNLESS OTHERWISE
SPECIFIED.
12) FOR REFERENCE ONLY THE STACKUP CORRESPONDS TO JLCPCB
STACKUP JLC04161H-7628.</textvar>
<textvar name="GIT_HASH">af84182</textvar>
<textvar name="GIT_HASH_PCB">6f934d1</textvar>
<textvar name="GIT_HASH_SCH">af84182</textvar>
<textvar name="GIT_URL">/jkrauss/Test_4</textvar>
<textvar name="PROJECT_CODE">P99</textvar>
<textvar name="RELEASE_DATE">2026-03-10</textvar>
<textvar name="RELEASE_STATE">DRAFT</textvar>
<textvar name="REVISION">NO_TAG+ (Unreleased)</textvar>
<textvar name="SCALE">1:1</textvar>
<textvar name="SCHEMATIC_NOTES">Unless otherwise specified, components Values are in ohms, µF, and µH.</textvar>
<textvar name="SHEET_NAME_01">Cover Page</textvar>
<textvar name="SHEET_NAME_02">Project</textvar>
<textvar name="SHEET_NAME_03">......................................</textvar>
<textvar name="SHEET_NAME_04">......................................</textvar>
<textvar name="SHEET_NAME_05">......................................</textvar>
<textvar name="SHEET_NAME_06">......................................</textvar>
<textvar name="SHEET_NAME_07">......................................</textvar>
<textvar name="SHEET_NAME_08">......................................</textvar>
<textvar name="SHEET_NAME_09">......................................</textvar>
<textvar name="SHEET_NAME_10">......................................</textvar>
<textvar name="SHEET_NAME_11">......................................</textvar>
<textvar name="SHEET_NAME_12">......................................</textvar>
<textvar name="SHEET_NAME_13">......................................</textvar>
<textvar name="SHEET_NAME_14">......................................</textvar>
<textvar name="SHEET_NAME_15">......................................</textvar>
<textvar name="SHEET_NAME_16">......................................</textvar>
<textvar name="SHEET_NAME_17">......................................</textvar>
<textvar name="SHEET_NAME_18">......................................</textvar>
<textvar name="SHEET_NAME_19">......................................</textvar>
<textvar name="SHEET_NAME_20">......................................</textvar>
<textvar name="STATE">TEMPLATE</textvar>
<textvar name="VARIANT"/>
<sheet number="1" name="/" tstamps="/">
<title_block>
<title>Title Page</title>
<company>Asymworks, LLC</company>
<rev>NO_TAG+ (Unreleased)</rev>
<date/>
<source>Test_6.kicad_sch</source>
<comment number="1" value=""/>
<comment number="2" value=""/>
<comment number="3" value=""/>
<comment number="4" value=""/>
<comment number="5" value=""/>
<comment number="6" value=""/>
<comment number="7" value=""/>
<comment number="8" value=""/>
<comment number="9" value=""/>
</title_block>
</sheet>
<sheet number="2" name="/Project/" tstamps="/f6afef58-d841-4ad6-baf9-746b0a35f011/">
<title_block>
<title/>
<company/>
<rev/>
<date/>
<source>Project.kicad_sch</source>
<comment number="1" value=""/>
<comment number="2" value=""/>
<comment number="3" value=""/>
<comment number="4" value=""/>
<comment number="5" value=""/>
<comment number="6" value=""/>
<comment number="7" value=""/>
<comment number="8" value=""/>
<comment number="9" value=""/>
</title_block>
</sheet>
</design>
<components/>
<libparts/>
<libraries/>
<nets/>
</export>

View File

@@ -223,6 +223,7 @@ import:
NAME_COMP_COUNT: @CSV_COMP_COUNT_OUPUT@ NAME_COMP_COUNT: @CSV_COMP_COUNT_OUPUT@
NAME_CSV_DRILL_TABLE: @CSV_DRILL_TABLE_OUTPUT@ NAME_CSV_DRILL_TABLE: @CSV_DRILL_TABLE_OUTPUT@
NAME_IMPEDANCE_TABLE: @CSV_IMPEDANCE_TABLE_OUTPUT@ NAME_IMPEDANCE_TABLE: @CSV_IMPEDANCE_TABLE_OUTPUT@
NAME_CSV_BOM_TABLE: @CSV_BOM_OUTPUT@
# Generated Outputs ======================================================== # Generated Outputs ========================================================

View File

@@ -66,6 +66,17 @@ preflight:
row_spacing: 3 row_spacing: 3
column_spacing: 1 column_spacing: 1
- name: '@NAME_CSV_BOM_TABLE@'
text_alignment: 'left'
invert_columns_order: false
border_width: 0.2
header_rule_width: 0.2
vertical_rule_width: 0
top_rule_width: 0
bottom_rule_width: 0
row_spacing: 3
column_spacing: 1
... ...
definitions: definitions:
NAME_TP_TOP: csv_testpoints_top NAME_TP_TOP: csv_testpoints_top
@@ -73,3 +84,4 @@ definitions:
NAME_COMP_COUNT: csv_comp_count NAME_COMP_COUNT: csv_comp_count
NAME_CSV_DRILL_TABLE: csv_drill_table NAME_CSV_DRILL_TABLE: csv_drill_table
NAME_IMPEDANCE_TABLE: csv_impedance_table NAME_IMPEDANCE_TABLE: csv_impedance_table
NAME_CSV_BOM_TABLE: csv_bom

2
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# KiCad Temporary Files
*.bak

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21
lib/asymworks/LICENSE Normal file
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@@ -0,0 +1,21 @@
MIT License
Copyright (c) 2024, Asymworks LLC
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.

29
lib/asymworks/README.md Normal file
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@@ -0,0 +1,29 @@
# Asymworks KiCad Library
## Usage
The recommended way to use this library is with `git subtree` into an `asymworks` folder under the current project, and reference it as a Project Library from KiCad.
```sh
git remote add -f asymworks-library https://git.asymworks.com/asymworks/kicad-library.git
git subtree add --prefix ./asymworks asymworks-library main --squash
```
Add the library to KiCad relative to the `${KIPRJMOD}` variable.
> [!NOTE]
> The Asymworks library currently has a mix of path specs for 3D models, most of which still use the legacy `${KICAD_USER_TEMPLATE_DIR}/asymworks-kicad-library` root rather than `${KIPRJMOD}/asymworks`. Manual intervention to change the path within `pcbnew` may be required for 3D models to show up correctly.
The library can be modified from the local project directory, and changes committed back to the main repository, using a similar syntax.
```sh
git add ./asymworks
git commit -m 'feat: added footprints XXXX'
git subtree push --prefix ./asymworks asymworks-library main
```
> [!WARNING]
> When using `git subtree` ensure that only changes within the subtree are added to a particular commit. Mixing files in a single commit between subtree and main project files may break things.
## Useful Links
[KiCad Library Conventions](https://klc.kicad.org)

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View File

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)

View File

@@ -0,0 +1,37 @@
(footprint "CONN_S3B-XH-SM4-TBLFSN_JST" (version 20211014) (generator pcbnew)
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)

View File

@@ -0,0 +1,39 @@
(footprint "CONN_S4B-XH-SM4-TB_JST" (version 20211014) (generator pcbnew)
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View File

@@ -0,0 +1,43 @@
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)

View File

@@ -0,0 +1,44 @@
(footprint "PQFN6_2X2_INF" (version 20211014) (generator pcbnew)
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)
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)
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)

View File

@@ -0,0 +1,44 @@
(footprint "PQFN6_2X2_INF" (version 20211014) (generator pcbnew)
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)

View File

@@ -0,0 +1,67 @@
(footprint "PQFN6_2X2_INF" (version 20221018) (generator pcbnew)
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View File

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(number "2" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at -10.16 -2.54 0) (length 2.54)
(name "SDA_A" (effects (font (size 1.27 1.27))))
(number "3" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at 0 -12.7 90) (length 2.54)
(name "GND" (effects (font (size 1.27 1.27))))
(number "4" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at 10.16 -2.54 180) (length 2.54)
(name "SDA_B" (effects (font (size 1.27 1.27))))
(number "5" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at 2.54 12.7 270) (length 2.54)
(name "VCCB" (effects (font (size 1.27 1.27))))
(number "6" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at 10.16 0 180) (length 2.54)
(name "SCL_B" (effects (font (size 1.27 1.27))))
(number "7" (effects (font (size 1.27 1.27))))
)
(pin input line (at -10.16 2.54 0) (length 2.54)
(name "OE" (effects (font (size 1.27 1.27))))
(number "8" (effects (font (size 1.27 1.27))))
)
)
)
)

View File

@@ -0,0 +1,153 @@
(kicad_symbol_lib (version 20220914) (generator kicad_symbol_editor)
(symbol "Adafruit_HUZZAH32_ESP32_Breakout" (in_bom yes) (on_board yes)
(property "Reference" "A" (at -12.7 29.21 0)
(effects (font (size 1.27 1.27)) (justify left))
)
(property "Value" "Adafruit_HUZZAH32_ESP32_Breakout" (at 2.54 -31.75 0)
(effects (font (size 1.27 1.27)) (justify left))
)
(property "Footprint" "Asym_MCU_Module:Adafruit_HUZZAH32" (at 2.54 -34.29 0)
(effects (font (size 1.27 1.27)) (justify left) hide)
)
(property "Datasheet" "https://www.adafruit.com/product/4172" (at 0 -30.48 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_keywords" "Adafruit feather microcontroller module USB" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_description" "Microcontroller module with ESP32 MCU" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_fp_filters" "Adafruit*Feather*" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(symbol "Adafruit_HUZZAH32_ESP32_Breakout_0_1"
(rectangle (start -12.7 27.94) (end 12.7 -30.48)
(stroke (width 0.254) (type default))
(fill (type background))
)
)
(symbol "Adafruit_HUZZAH32_ESP32_Breakout_1_1"
(pin input line (at 15.24 20.32 180) (length 2.54)
(name "~{RESET}" (effects (font (size 1.27 1.27))))
(number "1" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at 15.24 -2.54 180) (length 2.54)
(name "T7/IO27" (effects (font (size 1.27 1.27))))
(number "10" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at 15.24 -5.08 180) (length 2.54)
(name "T6/IO14" (effects (font (size 1.27 1.27))))
(number "11" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at 15.24 -7.62 180) (length 2.54)
(name "T5/IO12" (effects (font (size 1.27 1.27))))
(number "12" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at 15.24 -10.16 180) (length 2.54)
(name "T4/IO13" (effects (font (size 1.27 1.27))))
(number "13" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at 2.54 30.48 270) (length 2.54)
(name "3V3" (effects (font (size 1.27 1.27))))
(number "14" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at 0 -33.02 90) (length 2.54)
(name "GND" (effects (font (size 1.27 1.27))))
(number "15" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at -2.54 30.48 270) (length 2.54)
(name "VBAT" (effects (font (size 1.27 1.27))))
(number "16" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at 15.24 -12.7 180) (length 2.54)
(name "T3/IO15" (effects (font (size 1.27 1.27))))
(number "17" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at 15.24 -15.24 180) (length 2.54)
(name "T2/IO2" (effects (font (size 1.27 1.27))))
(number "18" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at 15.24 -17.78 180) (length 2.54)
(name "T1/IO0" (effects (font (size 1.27 1.27))))
(number "19" (effects (font (size 1.27 1.27))))
)
(pin input line (at 15.24 15.24 180) (length 2.54)
(name "I36" (effects (font (size 1.27 1.27))))
(number "2" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at 15.24 -20.32 180) (length 2.54)
(name "T0/IO4" (effects (font (size 1.27 1.27))))
(number "20" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at -15.24 5.08 0) (length 2.54)
(name "IO16" (effects (font (size 1.27 1.27))))
(number "21" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at -15.24 2.54 0) (length 2.54)
(name "IO17" (effects (font (size 1.27 1.27))))
(number "22" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at -15.24 0 0) (length 2.54)
(name "IO5" (effects (font (size 1.27 1.27))))
(number "23" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at -15.24 -2.54 0) (length 2.54)
(name "IO18" (effects (font (size 1.27 1.27))))
(number "24" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at -15.24 -5.08 0) (length 2.54)
(name "IO19" (effects (font (size 1.27 1.27))))
(number "25" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at -15.24 -12.7 0) (length 2.54)
(name "SDA/IO21" (effects (font (size 1.27 1.27))))
(number "26" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at -15.24 20.32 0) (length 2.54)
(name "RX/IO9" (effects (font (size 1.27 1.27))))
(number "27" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at -15.24 17.78 0) (length 2.54)
(name "TX/IO10" (effects (font (size 1.27 1.27))))
(number "28" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at -15.24 -15.24 0) (length 2.54)
(name "SCL/IO22" (effects (font (size 1.27 1.27))))
(number "29" (effects (font (size 1.27 1.27))))
)
(pin input line (at 15.24 12.7 180) (length 2.54)
(name "I39" (effects (font (size 1.27 1.27))))
(number "3" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at -15.24 -7.62 0) (length 2.54)
(name "IO23" (effects (font (size 1.27 1.27))))
(number "30" (effects (font (size 1.27 1.27))))
)
(pin input line (at 15.24 10.16 180) (length 2.54)
(name "I34/A2" (effects (font (size 1.27 1.27))))
(number "4" (effects (font (size 1.27 1.27))))
)
(pin input line (at 15.24 7.62 180) (length 2.54)
(name "I35/A13" (effects (font (size 1.27 1.27))))
(number "5" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at 15.24 2.54 180) (length 2.54)
(name "T9/IO32" (effects (font (size 1.27 1.27))))
(number "6" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at 15.24 0 180) (length 2.54)
(name "T8/IO33" (effects (font (size 1.27 1.27))))
(number "7" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at -15.24 12.7 0) (length 2.54)
(name "DAC1/IO25" (effects (font (size 1.27 1.27))))
(number "8" (effects (font (size 1.27 1.27))))
)
(pin bidirectional line (at -15.24 10.16 0) (length 2.54)
(name "DAC2/IO26" (effects (font (size 1.27 1.27))))
(number "9" (effects (font (size 1.27 1.27))))
)
)
)
)

View File

@@ -0,0 +1,204 @@
(kicad_symbol_lib (version 20220914) (generator kicad_symbol_editor)
(symbol "TPS7A20_SOT-23" (pin_names (offset 0.254)) (in_bom yes) (on_board yes)
(property "Reference" "U" (at 0 2.54 0)
(effects (font (size 1.524 1.524)))
)
(property "Value" "TPS7A20_SOT-23" (at 0 0 0)
(effects (font (size 1.524 1.524)))
)
(property "Footprint" "Package_TO_SOT_SMD:SOT-23-5" (at 0 0 0)
(effects (font (size 1.27 1.27) italic) hide)
)
(property "Datasheet" "https://www.ti.com/lit/gpn/tps7a20" (at 0 0 0)
(effects (font (size 1.27 1.27) italic) hide)
)
(property "ki_keywords" "TPS7A20" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_description" "300-mA ultra-low-noise low-IQ low-dropout (LDO) linear regulator with high PSRR" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_fp_filters" "DBV0005A-IPC_A DBV0005A-IPC_B DBV0005A-IPC_C DBV0005A-MFG" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(symbol "TPS7A20_SOT-23_0_1"
(polyline
(pts
(xy 5.08 -12.7)
(xy 25.4 -12.7)
)
(stroke (width 0.2032) (type default))
(fill (type none))
)
(polyline
(pts
(xy 5.08 5.08)
(xy 5.08 -12.7)
)
(stroke (width 0.2032) (type default))
(fill (type none))
)
(polyline
(pts
(xy 25.4 -12.7)
(xy 25.4 5.08)
)
(stroke (width 0.2032) (type default))
(fill (type none))
)
(polyline
(pts
(xy 25.4 5.08)
(xy 5.08 5.08)
)
(stroke (width 0.2032) (type default))
(fill (type none))
)
(pin power_in line (at 0 0 0) (length 5.08)
(name "IN" (effects (font (size 1.27 1.27))))
(number "1" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at 30.48 -10.16 180) (length 5.08)
(name "GND" (effects (font (size 1.27 1.27))))
(number "2" (effects (font (size 1.27 1.27))))
)
(pin input line (at 0 -5.08 0) (length 5.08)
(name "EN" (effects (font (size 1.27 1.27))))
(number "3" (effects (font (size 1.27 1.27))))
)
(pin unspecified line (at 0 -10.16 0) (length 5.08)
(name "NC" (effects (font (size 1.27 1.27))))
(number "4" (effects (font (size 1.27 1.27))))
)
(pin unspecified line (at 30.48 0 180) (length 5.08)
(name "OUT" (effects (font (size 1.27 1.27))))
(number "5" (effects (font (size 1.27 1.27))))
)
)
)
(symbol "TPS7A2033PDVBR" (extends "TPS7A20_SOT-23")
(property "Reference" "U" (at 0 2.54 0)
(effects (font (size 1.524 1.524)))
)
(property "Value" "TPS7A20_SOT-23" (at 0 0 0)
(effects (font (size 1.524 1.524)))
)
(property "Footprint" "" (at 0 0 0)
(effects (font (size 1.27 1.27) italic) hide)
)
(property "Datasheet" "" (at 0 0 0)
(effects (font (size 1.27 1.27) italic) hide)
)
(property "ki_keywords" "TPS7A20" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_description" "300-mA ultra-low-noise low-IQ low-dropout (LDO) linear regulator with high PSRR" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_fp_filters" "DBV0005A-IPC_A DBV0005A-IPC_B DBV0005A-IPC_C DBV0005A-MFG" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
)
(symbol "TPS7A20_X2SON" (pin_names (offset 0.254)) (in_bom yes) (on_board yes)
(property "Reference" "U" (at 0 2.54 0)
(effects (font (size 1.524 1.524)))
)
(property "Value" "TPS7A20_SOT-23" (at 0 0 0)
(effects (font (size 1.524 1.524)))
)
(property "Footprint" "Package_SON:Texas_X2SON-4_1x1mm_P0.65mm" (at 0 0 0)
(effects (font (size 1.27 1.27) italic) hide)
)
(property "Datasheet" "https://www.ti.com/lit/gpn/tps7a20" (at 0 0 0)
(effects (font (size 1.27 1.27) italic) hide)
)
(property "ki_keywords" "TPS7A20" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_description" "300-mA ultra-low-noise low-IQ low-dropout (LDO) linear regulator with high PSRR" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_fp_filters" "DBV0005A-IPC_A DBV0005A-IPC_B DBV0005A-IPC_C DBV0005A-MFG" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(symbol "TPS7A20_X2SON_0_1"
(polyline
(pts
(xy 5.08 -12.7)
(xy 25.4 -12.7)
)
(stroke (width 0.2032) (type default))
(fill (type none))
)
(polyline
(pts
(xy 5.08 5.08)
(xy 5.08 -12.7)
)
(stroke (width 0.2032) (type default))
(fill (type none))
)
(polyline
(pts
(xy 25.4 -12.7)
(xy 25.4 5.08)
)
(stroke (width 0.2032) (type default))
(fill (type none))
)
(polyline
(pts
(xy 25.4 5.08)
(xy 5.08 5.08)
)
(stroke (width 0.2032) (type default))
(fill (type none))
)
(pin input line (at 0 -5.08 0) (length 5.08)
(name "EN" (effects (font (size 1.27 1.27))))
(number "3" (effects (font (size 1.27 1.27))))
)
)
(symbol "TPS7A20_X2SON_1_1"
(pin unspecified line (at 30.48 0 180) (length 5.08)
(name "OUT" (effects (font (size 1.27 1.27))))
(number "1" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at 30.48 -10.16 180) (length 5.08)
(name "GND" (effects (font (size 1.27 1.27))))
(number "2" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at 0 0 0) (length 5.08)
(name "IN" (effects (font (size 1.27 1.27))))
(number "4" (effects (font (size 1.27 1.27))))
)
(pin unspecified line (at 0 -10.16 0) (length 5.08)
(name "THRM" (effects (font (size 1.27 1.27))))
(number "5" (effects (font (size 1.27 1.27))))
)
)
)
(symbol "TPS7A2033PDQNR" (extends "TPS7A20_X2SON")
(property "Reference" "U" (at 0 2.54 0)
(effects (font (size 1.524 1.524)))
)
(property "Value" "TPS7A20_SOT-23" (at 0 0 0)
(effects (font (size 1.524 1.524)))
)
(property "Footprint" "" (at 0 0 0)
(effects (font (size 1.27 1.27) italic) hide)
)
(property "Datasheet" "" (at 0 0 0)
(effects (font (size 1.27 1.27) italic) hide)
)
(property "ki_keywords" "TPS7A20" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_description" "300-mA ultra-low-noise low-IQ low-dropout (LDO) linear regulator with high PSRR" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_fp_filters" "DBV0005A-IPC_A DBV0005A-IPC_B DBV0005A-IPC_C DBV0005A-MFG" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
)
)

View File

@@ -0,0 +1,112 @@
(kicad_symbol_lib (version 20220914) (generator kicad_symbol_editor)
(symbol "TLV61070ADBV" (pin_names (offset 0.254)) (in_bom yes) (on_board yes)
(property "Reference" "U" (at -5.08 7.62 0)
(effects (font (size 1.27 1.27)) (justify left))
)
(property "Value" "TLV61070ADBV" (at 0 7.62 0)
(effects (font (size 1.27 1.27)) (justify left))
)
(property "Footprint" "Package_TO_SOT_SMD:SOT-23-6" (at 1.27 -3.81 0)
(effects (font (size 1.27 1.27) italic) (justify left) hide)
)
(property "Datasheet" "http://www.ti.com/lit/ds/symlink/tlv61070a.pdf" (at 0 2.54 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_keywords" "Step-Up DC-DC Converter" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_description" "2.5-A Boost Converter with 0.5-V Ultra-low Input Voltage, SOT23-6" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_fp_filters" "SOT?23*" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(symbol "TLV61070ADBV_0_1"
(rectangle (start -5.08 6.35) (end 5.08 -2.54)
(stroke (width 0.254) (type default))
(fill (type background))
)
)
(symbol "TLV61070ADBV_1_1"
(pin power_in line (at 7.62 5.08 180) (length 2.54)
(name "SW" (effects (font (size 1.27 1.27))))
(number "1" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at 0 -5.08 90) (length 2.54)
(name "GND" (effects (font (size 1.27 1.27))))
(number "2" (effects (font (size 1.27 1.27))))
)
(pin input line (at -7.62 0 0) (length 2.54)
(name "EN" (effects (font (size 1.27 1.27))))
(number "3" (effects (font (size 1.27 1.27))))
)
(pin input line (at 7.62 0 180) (length 2.54)
(name "FB" (effects (font (size 1.27 1.27))))
(number "4" (effects (font (size 1.27 1.27))))
)
(pin power_out line (at 7.62 2.54 180) (length 2.54)
(name "VOUT" (effects (font (size 1.27 1.27))))
(number "5" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at -7.62 5.08 0) (length 2.54)
(name "VBAT" (effects (font (size 1.27 1.27))))
(number "6" (effects (font (size 1.27 1.27))))
)
)
)
(symbol "TLV61220DBV" (pin_names (offset 0.254)) (in_bom yes) (on_board yes)
(property "Reference" "U" (at -5.08 7.62 0)
(effects (font (size 1.27 1.27)) (justify left))
)
(property "Value" "TLV61220DBV" (at 0 7.62 0)
(effects (font (size 1.27 1.27)) (justify left))
)
(property "Footprint" "Package_TO_SOT_SMD:SOT-23-6" (at 1.27 -3.81 0)
(effects (font (size 1.27 1.27) italic) (justify left) hide)
)
(property "Datasheet" "http://www.ti.com/lit/ds/symlink/tlv61220.pdf" (at 0 2.54 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_keywords" "Step-Up DC-DC Converter" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_description" "28-V Output Voltage Boost Converter with Power Diode and Isolation Switch, SOT-23-6" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "ki_fp_filters" "SOT?23*" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(symbol "TLV61220DBV_0_1"
(rectangle (start -5.08 6.35) (end 5.08 -2.54)
(stroke (width 0.254) (type default))
(fill (type background))
)
)
(symbol "TLV61220DBV_1_1"
(pin power_in line (at 7.62 5.08 180) (length 2.54)
(name "SW" (effects (font (size 1.27 1.27))))
(number "1" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at 0 -5.08 90) (length 2.54)
(name "GND" (effects (font (size 1.27 1.27))))
(number "2" (effects (font (size 1.27 1.27))))
)
(pin input line (at -7.62 0 0) (length 2.54)
(name "EN" (effects (font (size 1.27 1.27))))
(number "3" (effects (font (size 1.27 1.27))))
)
(pin input line (at 7.62 0 180) (length 2.54)
(name "FB" (effects (font (size 1.27 1.27))))
(number "4" (effects (font (size 1.27 1.27))))
)
(pin power_out line (at 7.62 2.54 180) (length 2.54)
(name "VOUT" (effects (font (size 1.27 1.27))))
(number "5" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at -7.62 5.08 0) (length 2.54)
(name "VBAT" (effects (font (size 1.27 1.27))))
(number "6" (effects (font (size 1.27 1.27))))
)
)
)
)

View File

@@ -0,0 +1,2 @@
(kicad_symbol_lib (version 20220914) (generator kicad_symbol_editor)
)

View File

@@ -0,0 +1,290 @@
(kicad_symbol_lib
(version 20241209)
(generator "kicad_symbol_editor")
(generator_version "9.0")
(symbol "Si2301CDS"
(exclude_from_sim no)
(in_bom yes)
(on_board yes)
(property "Reference" "Q"
(at 2.54 2.032 0)
(effects
(font
(size 1.27 1.27)
)
(justify left)
)
)
(property "Value" "Si2301CDS"
(at 2.54 0 0)
(effects
(font
(size 1.27 1.27)
)
(justify left)
)
)
(property "Footprint" "Package_TO_SOT_SMD:SOT-23"
(at 2.032 -4.318 0)
(effects
(font
(size 1.27 1.27)
)
(justify left)
(hide yes)
)
)
(property "Datasheet" "https://www.vishay.com/doc/?68741"
(at 2.032 -2.032 0)
(effects
(font
(size 1.27 1.27)
)
(justify left)
(hide yes)
)
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ASSEMBLY NOTES (UNLESS OTHERWISE SPECIFIED)
1) DO NOT POPULATE COMPONENTS ARE MARKED WITH A RED CROSS
2) DO NOT POPULATE COMPONENTS ARE NOT PRESENT IN THE BOM
3) IF CONFLICTING INFORMATION IS FOUND BETWEEN THE ASSEMBLY
FILE AND BOM, BOM SHOULD BE USED AS THE MAIN SOURCE.
4) DOT IDENTIFIES PIN #1 LOCATION AND DEVICE ORIENTATION
WHEN VIEWED FROM THE TOP.

View File

@@ -0,0 +1 @@
Row,Quantity Per PCB,References,Value,Datasheet,Footprint,Description,Asymworks IPN,Manufacturer,Manufacturer PN,LCSC
1 Row Quantity Per PCB References Value Datasheet Footprint Description Asymworks IPN Manufacturer Manufacturer PN LCSC

View File

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<tr>
<td class="cell-info">
<b>Schematic</b>: Test_6<br>
<b>Variant</b>: default<br>
<b>Revision</b>: NO_TAG+ (Unreleased)<br>
<b>Date</b>: 2026-03-10_17-36-57<br>
<b>KiCad Version</b>: 9.0.7+1<br>
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<b>Component Groups</b>: 0<br>
<b>Component Count</b>: 0 (per PCB)<br>
<b>Fitted Components</b>: 0 (per PCB)<br>
<b>Number of PCBs</b>: 1<br>
<b>Total Components</b>: 0 (for 1 PCBs)<br>
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<th class="th-kicad">Datasheet</th>
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<th class="th-user">LCSC</th>
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View File

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Type,Front Side,Back Side,Total
THT,0,0,0
SMD,0,0,0
Total,0,0,0
1 Type Front Side Back Side Total
2 THT 0 0 0
3 SMD 0 0 0
4 Total 0 0 0

View File

@@ -0,0 +1,50 @@
FABRICATION NOTES (UNLESS OTHERWISE SPECIFIED)
1) FABRICATE PER IPC-6012A CLASS 2.
2) OUTLINE DEFINED IN SEPARATE GERBER FILE WITH
"Edge_Cuts.GBR" SUFFIX.
3) SEE SEPARATE DRILL FILES WITH ".DRL" SUFFIX
FOR HOLE LOCATIONS.
SELECTED HOLE LOCATIONS SHOWN ON THIS DRAWING
FOR REFERENCE ONLY.
4) SURFACE FINISH: ENIG
5) SOLDERMASK ON BOTH SIDES OF THE BOARD SHALL
BE LPI, COLOR GREEN.
6) SILK SCREEN LEGEND TO BE APPLIED PER LAYER
STACKUP USING WHITE NON-CONDUCTIVE EPOXY INK.
7) ALL VIAS ARE TENTED ON BOTH SIDES UNLESS
SOLDERMASK OPENED IN GERBER.
8) RESERVED
9) PCB MATERIAL REQUIREMENTS:
A. FLAMMABILITY RATING MUST MEET OR EXCEED
UL94V-0 REQUIREMENTS.
B. Tg 135 C OR EQUIVALENT.
10) DESIGN GEOMETRY MINIMUM FEATURE SIZES:
BOARD SIZE N/A × N/A mm
BOARD THICKNESS 1.647 mm
TRACE WIDTH N/A mm
TRACE TO TRACE 0.200 mm
MIN. HOLE (PTH) N/A mm
MIN. HOLE (NPTH) N/A mm
ANNULAR RING N/A mm
COPPER TO HOLE 0.250 mm
COPPER TO EDGE 0.500 mm
HOLE TO HOLE 0.250 mm
11) ALL DIMENSIONS ARE IN MILLIMETERS UNLESS OTHERWISE
SPECIFIED.
12) FOR REFERENCE ONLY THE STACKUP CORRESPONDS TO JLCPCB
STACKUP JLC04161H-7628.

View File

@@ -0,0 +1,4 @@
Layer,Ref1,Ref2,Type,Impedance [ohms],Width [mil],Space [mil],Tolerance
L1,AIR,L2,SE,50,13.75,-----,10%
L1,AIR,L2,DIFF,90,11.26,8.00,10%
L1,AIR,L2,DIFF,100,8.68,8.00,10%
1 Layer Ref1 Ref2 Type Impedance [ohms] Width [mil] Space [mil] Tolerance
2 L1 AIR L2 SE 50 13.75 ----- 10%
3 L1 AIR L2 DIFF 90 11.26 8.00 10%
4 L1 AIR L2 DIFF 100 8.68 8.00 10%

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