63 lines
1.7 KiB
Plaintext
63 lines
1.7 KiB
Plaintext
FABRICATION NOTES (UNLESS OTHERWISE SPECIFIED)
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1) FABRICATE PER IPC-6012A CLASS 2.
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2) OUTLINE DEFINED IN SEPARATE GERBER FILE WITH
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"Edge_Cuts.GBR" SUFFIX.
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3) SEE SEPARATE DRILL FILES WITH ".DRL" SUFFIX
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FOR HOLE LOCATIONS.
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SELECTED HOLE LOCATIONS SHOWN ON THIS DRAWING
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FOR REFERENCE ONLY.
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4) SURFACE FINISH: ${pcb_finish_cap}
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5) SOLDERMASK ON BOTH SIDES OF THE BOARD SHALL
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BE LPI, COLOR ${solder_mask_color_text_cap}.
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6) SILK SCREEN LEGEND TO BE APPLIED PER LAYER
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STACKUP USING ${silk_screen_color_text_cap} NON-CONDUCTIVE EPOXY INK.
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7) ALL VIAS ARE TENTED ON BOTH SIDES UNLESS
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SOLDERMASK OPENED IN GERBER.
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8) RESERVED
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9) PCB MATERIAL REQUIREMENTS:
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A. FLAMMABILITY RATING MUST MEET OR EXCEED
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UL94V-0 REQUIREMENTS.
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B. Tg 135 C OR EQUIVALENT.
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10) DESIGN GEOMETRY MINIMUM FEATURE SIZES:
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BOARD SIZE ${bb_w_mm} × ${bb_h_mm} mm
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BOARD THICKNESS ${thickness_mm} mm
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TRACE WIDTH ${track_mm} mm
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TRACE TO TRACE ${clearance_mm} mm
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MIN. HOLE (PTH) ${drill_pth_real_mm} mm
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MIN. HOLE (NPTH) ${drill_npth_real_mm} mm
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ANNULAR RING ${oar_mm} mm
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COPPER TO HOLE ${c2h_mm} mm
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COPPER TO EDGE ${c2e_mm} mm
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HOLE TO HOLE ${h2h_mm} mm
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11) ALL DIMENSIONS ARE IN MILLIMETERS UNLESS OTHERWISE
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SPECIFIED.
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12) FOR REFERENCE ONLY THE STACKUP CORRESPONDS TO JLCPCB
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STACKUP JLC04161H-7628.
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#?stackup and impedance_controlled
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#?stackup and impedance_controlled
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13) REFER TO IMPEDANCE TABLE FOR IMPEDANCE CONTROL REQUIREMENTS.
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#?stackup and impedance_controlled
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THE SUPPLIED ARTWORK MAY OR MAY NOT CONTAIN THE SPECIFIED
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#?stackup and impedance_controlled
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TRACE GEOMETRIES ON EVERY LAYERS SPECIFIED.
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#?stackup and impedance_controlled
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#?stackup and impedance_controlled
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14) CONFIRM SPACE WIDTHS AND SPACINGS.
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