FABRICATION NOTES (UNLESS OTHERWISE SPECIFIED)

1)	FABRICATE PER IPC-6012A CLASS 2.

2)	OUTLINE DEFINED IN SEPARATE GERBER FILE WITH
	"Edge_Cuts.GBR" SUFFIX.

3)	SEE SEPARATE DRILL FILES WITH ".DRL" SUFFIX 
	FOR HOLE LOCATIONS.

	SELECTED HOLE LOCATIONS SHOWN ON THIS DRAWING 
	FOR REFERENCE ONLY.

4)	SURFACE FINISH: ${pcb_finish_cap}

5)	SOLDERMASK ON BOTH SIDES OF THE BOARD SHALL 
	BE LPI, COLOR ${solder_mask_color_text_cap}.

6)	SILK SCREEN LEGEND TO BE APPLIED PER LAYER 
	STACKUP USING ${silk_screen_color_text_cap} NON-CONDUCTIVE EPOXY INK.

7)	ALL VIAS ARE TENTED ON BOTH SIDES UNLESS 
	SOLDERMASK OPENED IN GERBER.

8)	RESERVED

9)	PCB MATERIAL REQUIREMENTS:

	A.	FLAMMABILITY RATING MUST MEET OR EXCEED 
		UL94V-0 REQUIREMENTS.
	B.	Tg 135 C OR EQUIVALENT.

10)	DESIGN GEOMETRY MINIMUM FEATURE SIZES:

	BOARD SIZE				${bb_w_mm} × ${bb_h_mm} mm
	BOARD THICKNESS		${thickness_mm} mm
	TRACE WIDTH			${track_mm} mm
	TRACE TO TRACE		${clearance_mm} mm
	MIN. HOLE (PTH)			${drill_pth_real_mm} mm
	MIN. HOLE (NPTH)		${drill_npth_real_mm} mm
	ANNULAR RING			${oar_mm} mm
	COPPER TO HOLE		${c2h_mm} mm
	COPPER TO EDGE		${c2e_mm} mm
	HOLE TO HOLE			${h2h_mm} mm

11)	ALL DIMENSIONS ARE IN MILLIMETERS UNLESS OTHERWISE
	SPECIFIED.

12)	FOR REFERENCE ONLY THE STACKUP CORRESPONDS TO JLCPCB
	STACKUP JLC04161H-7628.
#?stackup and impedance_controlled

#?stackup and impedance_controlled
13)	REFER TO IMPEDANCE TABLE FOR IMPEDANCE CONTROL REQUIREMENTS.
#?stackup and impedance_controlled
	THE SUPPLIED ARTWORK MAY OR MAY NOT CONTAIN THE SPECIFIED
#?stackup and impedance_controlled
	TRACE GEOMETRIES ON EVERY LAYERS SPECIFIED.
#?stackup and impedance_controlled

#?stackup and impedance_controlled
14)	CONFIRM SPACE WIDTHS AND SPACINGS.
