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kibot/templates/fabrication_notes.txt

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+FABRICATION NOTES (UNLESS OTHERWISE SPECIFIED)
+
+1)	FABRICATE PER IPC-6012A CLASS 2.
+
+2)	OUTLINE DEFINED IN SEPARATE GERBER FILE WITH
+	"Edge_Cuts.GBR" SUFFIX.
+
+3)	SEE SEPARATE DRILL FILES WITH ".DRL" SUFFIX 
+	FOR HOLE LOCATIONS.
+
+	SELECTED HOLE LOCATIONS SHOWN ON THIS DRAWING 
+	FOR REFERENCE ONLY.
+
+4)	SURFACE FINISH: ${pcb_finish_cap}
+
+5)	SOLDERMASK ON BOTH SIDES OF THE BOARD SHALL 
+	BE LPI, COLOR ${solder_mask_color_text_cap}.
+
+6)	SILK SCREEN LEGEND TO BE APPLIED PER LAYER 
+	STACKUP USING ${silk_screen_color_text_cap} NON-CONDUCTIVE EPOXY INK.
+
+7)	ALL VIAS ARE TENTED ON BOTH SIDES UNLESS 
+	SOLDERMASK OPENED IN GERBER.
+
+8)	RESERVED
+
+9)	PCB MATERIAL REQUIREMENTS:
+
+	A.	FLAMMABILITY RATING MUST MEET OR EXCEED 
+		UL94V-0 REQUIREMENTS.
+	B.	Tg 135 C OR EQUIVALENT.
+
+10)	DESIGN GEOMETRY MINIMUM FEATURE SIZES:
+
+	BOARD SIZE				${bb_w_mm} × ${bb_h_mm} mm
+	BOARD THICKNESS		${thickness_mm} mm
+	TRACE WIDTH			${track_mm} mm
+	TRACE TO TRACE		${clearance_mm} mm
+	MIN. HOLE (PTH)			${drill_pth_real_mm} mm
+	MIN. HOLE (NPTH)		${drill_npth_real_mm} mm
+	ANNULAR RING			${oar_mm} mm
+	COPPER TO HOLE		${c2h_mm} mm
+	COPPER TO EDGE		${c2e_mm} mm
+	HOLE TO HOLE			${h2h_mm} mm
+#?stackup and impedance_controlled
+
+#?stackup and impedance_controlled
+11)	REFER TO IMPEDANCE TABLE FOR IMPEDANCE CONTROL REQUIREMENTS.
+#?stackup and impedance_controlled
+
+#?stackup and impedance_controlled
+12)	CONFIRM SPACE WIDTHS AND SPACINGS.